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Performance Modeling/Verification Engineer - Intermediate

Santa Clara, California

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Today

Job Description: Pay Range: $51.72hr - $58.62hr Develop, enhance, and maintain SystemC/TLM2 models for memory controllers, peripherals, and interconnects, ensuring they accuXXly simulate the behavior and performance characteristics of the hardware. CollaboXX with cross teams to integXX models into client tools used for system-level designs, ensuring proper functionality and performance. Identify bottlenecks and performance issues within models and work to optimize their performance to meet desig

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Contract

$$51.72hr - $58.62hr

DFT/DFD Verification Engineer - Advanced SoC Projects

Remote or Santa Clara, California

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Today

DFT/DFD Verification Engineer Advanced SoC Projects We are looking for a seasoned Design-for-Test / Design-for-Debug Verification Engineer focused on validating sophisticated test and debug logic within next-generation SoCs. This position involves verifying scan architectures such as JTAG, iJTAG, and other internal debug features to support robust manufacturing testability and effective post-silicon debugging. The role will require tight collaboration with engineering teams across design, integ

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Full-time

$50-80

AI HW Design Verification Engineer

Remote or Santa Clara, California

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Today

AI HW Design Verification Engineer Looking for a Senior Design Verification Engineer. This person will play a key role in quality and reliability of digital designs through comprehensive verification methodologies. This person should have a strong background in verification techniques/processes, problem solving skills, and skilled at delivering high quality designs. Scope: Develop & execute comprehensive verification strategies in order to validate complex digital designs, ensuring compliance w

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Full-time

USD70 - USD90 per hour, Benefits: 70-90/hr

Principal Design Verification Engineer

Hybrid in San Jose, California

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Today

Principal Design Verification Engineer A leading chip and silicon IP provider focused on accelerating and securing data is looking to hire an outstanding Principal Design Verification Engineer to join its Memory Interface Chip (MIC) team in San Jose, CA. This role offers the chance to work alongside top engineering talent on innovative products that push the boundaries of speed and data security. As a Principal Design Verification Engineer, you ll play a critical role in the development of MIC p

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Full-time

$187,000 - $217,000

Silicon Verification Engineer

Mountain View, California

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Today

Our client, a leader in the technology sector, is seeking a Silicon Verification Engineer 5 to join their team. As a Silicon Verification Engineer 5, you will be part of a dynamic team supporting the development of cutting-edge silicon chips. The ideal candidate will have strong analytical skills, a proactive approach to problem-solving, and the ability to work independently, which will align successfully in the organization. Silicon Verification Engineer Mountain View, CA & Remote options 18

Full-time

Design Verification Engineer

Mountain View, California

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8d ago

Job Description Strong understanding of SV and UVM and good debugging skills. Understanding of AMBA protocols. Understand design specs and develop test plans based on functional and architectural requirements Build UVM/System Verilog-based verification environments for IP/subsystem/SoC level testing Develop directed and random testcases, perform coverage analysis, and close functional/code coverage Debug simulation failures and work closely with RTL designers to resolve issues Execute regressio

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Contract

$60 - $80

Design Verification Engineer

Mountain View, California

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16d ago

A client of Innova Solutions is immediately hiring for a Design Verification Engineer Position type: Contract Location: Mountain View, CA-Onsite As a Design Verification Engineer, you will be responsible for: Job description: Strong understanding of SV and UVM and good debugging skills.Understanding of AMBA protocols.Understand design specs and develop test plans based on functional and architectural requirements.Build UVM/System Verilog-based verification environments for IP/subsystem/SoC leve

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Contract

$60 - $70

Custom SOC IP Verification Engineer

Santa Clara, California

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Today

NVIDIA is seeking a Senior Custom SOC/IP Verification Engineer to verify the next generation SoC and IP solutions! We are looking for special individuals with desire to deliver innovative products. Together, we will build the next generation of life changing custom SOCs! If you are a motivated individual that understands how complex SOC and IPs are built, has intimate knowledge of client requirements, and understand various development cycles, this is your place to be. This role demands an exper

Full-time

USD 136,000.00 per year

ASIC Verification Engineer

San Jose, California

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Today

The application window is expected to close on 7/30/25. This role will work onsite out of our San Jose, CA office. Who We Are: The Common Hardware Group (CHG) delivers the silicon, optics, and hardware platforms for Cisco's core Switching, Routing, and Wireless products. We design the networking hardware for Enterprises and Service Providers of various sizes, the Public Sector, and Non-Profit Organizations across the world. Cisco Silicon One (#CiscoSiliconOne) is the only unifying silicon arc

Full-time

ASIC Verification Engineer

Santa Clara, California

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Today

WHAT YOU DO AT AMD CHANGES EVERYTHING We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences - the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world's most important challenges. We strive for execution excellenc

Full-time

USD 119,000.00 per year

Performance Modeling and Verification Engineer - Onsite

Santa Clara, California

•

Today

Title: Performance Modeling and Verification Engineer - Onsite Mandatory skills: SystemC, TLM2, ASIC, ASIC development, software, firmware, hardware, C, C++, Linux, Linux Environment, debug, debug tools, Gdb, Valgrind, Perl, Makefiles, DPI, PLI, PCIe, AXI, Verilog, SystemVerilog, SystemC, memory controllers, peripherals, interconnects, system design, system testing, system debugging, performance models, performance issues, design specifications, SV, UVM Functional Verification, Performance Veri

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Contract

$55.71 - $60.71

Design verification Engineer

Remote or Hybrid in Mountain View, California

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4d ago

Minimum Qualifications: Design Verification Engineering ServicesTestbench development System Verilog Universal Methodology (UVM), Python, and C testsIntegration/development of C tests/Application Programming Interface (APIs) and software build flowIntegration of UVM testbenchesTest development and debug, including without limitation tests for functionality, power, performance, error, and connectivity, both for RTL and Gate Level Netlist Design Under Test, tests for functional and code coverage

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Contract

$70 - $80

Low Power Verification Engineer

San Jose, California

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30+d ago

Job Title: Power Estimation Low Power Verification Engineer Location: San Jose, CA Job Description: Were seeking an experienced 10+ Yrs Power Estimation Low Power Verification Engineer to work with our team in San Jose, CA. As a key member of our team, youll be responsible for:- Collaborating with architects and logic designers to define power specifications and UPF- Supporting UPF for design, DV, and implementation teams- Verifying and signing off low power intent using VCLP tool- Defining low

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Contract, Third Party

$120,000 - $160,000

GPU Verification Engineer #25-02793

San Jose, California

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Today

Job DescriptionJob Details: Job Title: GPU Verification Engineer Duration: 06 Months Location: San Jose, CA 95134/Austin, Tx (expected to go in office 5 days a week) Job Description: Senior ASIC Verification Engineer to work on GPU Top VerificationASIC verification experience including development of verification strategy, test plans, tests, testbench components as well as regression triage, debug, and coverage closureExpertise in C, C++, and System VerilogExperience with industry standard desi

Full-time

FPGA/ASIC Verification Engineer (Silicon Engineering)

Sunnyvale, California

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Today

SpaceX was founded under the belief that a future where humanity is out exploring the stars is fundamentally more exciting than one where we are not. Today SpaceX is actively developing the technologies to make this possible, with the ultimate goal of enabling human life on Mars. FPGA/ASIC VERIFICATION ENGINEER (SILICON ENGINEERING) At SpaceX we're leveraging our experience in building rockets and spacecraft to deploy Starlink, the world's most advanced broadband internet system. Starlink is th

Full-time

USD 130,000.00 - 155,000.00 per year

Senior Custom SOC IP Verification Engineer

Santa Clara, California

•

Today

NVIDIA is seeking a Senior Custom SOC IP Verification Engineer to verify the next generation SoC and IP solutions! We are looking for special individuals with desire to deliver innovative products. Together, we will build the next generation of life changing custom SOCs! If you are a motivated individual that understands how complex SOC and IPs are built, has intimate knowledge of client requirements, and understand various development cycles, this is your place to be. What you'll be doing: Res

Full-time

USD 168,000.00 per year

IC Verification Engineer

San Jose, California

•

Today

Please Note: 1. If you are a first time user, please create your candidate login account before you apply for a job. (Click Sign In > Create Account) 2. If you already have a Candidate Account, please Sign-In before you apply. Job Description: Job duties include: Architect and develop scalable and reusable Testbench environment using the framework of Verification Methodologies. Drive Test plans for all features for Block/Core/SOC and Write Functional coverage for these features. Build pseudo

Full-time

USD 141,000.00 per year

Sr. Formal Verification Engineer, Dojo

Palo Alto, California

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Today

Tesla's Dojo Silicon Development Team is looking for a Formal Verification Engineer to develop and manage the formal verification and test environments, working closely with the architect, design, and simulation verification team to achieve high quality tape-out. We are looking for the best talent to work on state-of-the-art chip designs, where your limit is only your imagination. You will work with a team of highly talented engineers who are focused on advancing Tesla's AI mission. If you love

Full-time

USD 120,000.00 per year

Principal Verification Engineer

Hybrid in San Jose, California

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Today

A leading chip and silicon IP provider is looking to hire a talented Principal Verification Engineer to join its Memory Interconnect Design team in either San Jose, CA or Morrisville, NC. This is a great opportunity to work alongside some of the industry's top engineers to help develop cutting-edge technologies that accelerate and secure data. In this full-time role, the Principal Verification Engineer will report to the Director of Design Engineering and take a key role in product development

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Full-time

$166,000 - $196,000

CPU Formal Verification Engineer

Santa Clara, California

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Today

Company: Qualcomm Technologies, Inc. Job Area: Engineering Group, Engineering Group > CPU Engineering General Summary: Are you interested in working with a world-class CPU design team? Are you interested in the application of formal methods to the verification of application processors? In contributing to the development of the next generation of formal methodologies in this space? The Qualcomm CPU team has some of the best CPU architects and engineers on the planet, developing the processor

Full-time

USD 122,500.00 - 183,700.00 per year

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