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System Verilog UVM Design Verification Test Engineer

Remote

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28d ago

Job Description: The project relates to the design and verification of a custom controller for analog components. The controller has interfaces such as SPI, Ethernet and AXI to drive the internal components and send data. Responsibilities: UVM/python test development for driving VIPs and other stimulus driversGeneration of test components such as monitors, scoreboards and python modelsCoverage closure and GLS bringup and testing Experience: 6+ years of experience with verification methodologies

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Contract

Up to $110

UVM Digital Verification Engineer

Remote or Cambridge, Massachusetts

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Today

Overview: Draper is an independent, nonprofit research and development company headquartered in Cambridge, MA. The 2,000+ employees of Draper tackle important national challenges with a promise of delivering successful and usable solutions. From military defense and space exploration to biomedical engineering, lives often depend on the solutions we provide. Our multidisciplinary teams of engineers and scientists work in a collaborative environment that inspires the cross-fertilization of ideas

Full-time

Design Verification Engineer

Mountain View, California

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Today

Job Description Strong understanding of SV and UVM and good debugging skills. Understanding of AMBA protocols. Understand design specs and develop test plans based on functional and architectural requirements Build UVM/System Verilog-based verification environments for IP/subsystem/SoC level testing Develop directed and random testcases, perform coverage analysis, and close functional/code coverage Debug simulation failures and work closely with RTL designers to resolve issues Execute regressio

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Contract

$60 - $80

Design Verification Engineer

Mountain View, California

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7d ago

A client of Innova Solutions is immediately hiring for a Design Verification Engineer Position type: Contract Location: Mountain View, CA-Onsite As a Design Verification Engineer, you will be responsible for: Job description: Strong understanding of SV and UVM and good debugging skills.Understanding of AMBA protocols.Understand design specs and develop test plans based on functional and architectural requirements.Build UVM/System Verilog-based verification environments for IP/subsystem/SoC leve

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Contract

$60 - $70

Design Verification Engineer - SOC

San Jose, California

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13d ago

Millennium Software & Staffing is looking for Design Verification Engineer SOC at San Jose, CA Below are the details: Title : Design Verification Engineer SOC Location : San Jose, CA TOP SKILLS: SOCUVM, System VerilogIntegrate GPU, CPU, Arm Based SystemPCIe, DDR, Ethernet, Bus ProtocolsPython Scripting Candidate should have average or above average Python SkillsExperience: 8+ years of experience in SOC, SystemVerilog/UVM methodologyExperience in EDA tools and scripting (Python, TCL, Perl, Shell

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Contract

Depends on Experience

Design Verification Engineer

San Jose, California

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2d ago

Experience: 6 to 15+ years of experience. Job Requirements are as below: Architect block and full-chip verification environments using HVLs and constrained random techniques for SOCs with embedded CPUs and mixed signal interfaces. Requires UVM, System Verilog, SVA Develop test plans and coverage metrics from specifications and write block and chip-level tests in C,SV,UVM Debug RTL and Gate simulations and work with design engineers to verify fixes. Write diagnostics for validation of FPGA prot

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Full-time

Depends on Experience

Digital SoC Design Verification Principal Engineer/Manager

Hybrid in San Jose, California

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13d ago

Digital SoC Design Verification Principal Engineer/Manager 140-225K (+ Pre-IPO Stock Options) San Jose, CA (hybrid 1 day/week remote, 4 days/week onsite) We are looking for an experienced Digital SoC Design Verification Principal Engineer/Manager to lead a team of engineers in developing innovative Open RAN SoC functional blocks for 5G cellular base stations. In this role, you will be responsible for driving the development of high-quality digital solutions and contributing to product definition

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Full-time

$140,000 - $220,000

Mixed-Signal Design Verification Engineer

San Jose, California

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Today

Title: Mixed-Signal Design Verification Engineer Location: San Jose, CA Key Technical Skills:UVM/System Verilog, Python, Synopsys/Cadence EDA Verifications Tools, AMS Verification Required Experience/Skills: Good knowledge of System-Verilog RTL coding including state machines, adders, multipliers, combinatorial logic, etc. Good understanding of digital design for mixed signal control loops and designing Verilog / Verilog- A code to control analog circuits (e.g. bandgap, PLL, Amplifier, Filters

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Contract, Third Party

$50 to 65 per hour

Senior Design Verification Engineer - Ethernet PHY/PCS

Santa Clara, California

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3d ago

Job Title: Senior Design Verification Engineer - Ethernet PHY/PCS Location: Santa Clara, CA Job Type: Contract, Full-time Experience: 7+ years We're seeking an experienced Senior Design Verification Engineer with expertise in Ethernet PHY or PCS to join our team in Santa Clara, CA. Responsibilities: - Develop and execute verification plans for Ethernet PHY or PCS - Create and maintain testbenches and test suites - Collaborate with design engineers to resolve verification issues - Strong understa

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Contract, Third Party

$180,000 - $200,000

Verification Engineer

Hybrid in Santa Clara, California

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Today

Job Title: Verification Engineer - Specialized (US) Job ID: 25-08588 Location: Santa Clara, CA 95054 (Hybrid 3 days per week) Duration: 6 Months on W2 contract Job Duties: Participate in the functional verification of a block(s) of complex ASICs and/or IP cores for an I/O SOC. Be part of a team of design verification team , working closely with other team members to understand and verify the functionality of a given design element within the context of the block, chip and overall system. Candida

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Contract

$80 - $100

Software Development Engineer (Graphics) - Intermediate - Onsite

Folsom, California

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7d ago

Title: Software Development Engineer (Graphics) - Intermediate - Onsite Mandatory skills: Graphics, Graphics IP ASIC verification, Verilog, OVM, UVM, C, C++, Linux, VCS, Verdi, CPU, GPU, React, MongoDB, SQL, Python, Git, GitHub, Github Copilot, Jira, HLP, driver, firmware, GFXR, Debugging, SOC, Chip, engine development, program requirements, functional verification, test plan, random stimulus, assertions, custom logic checkers, reference models, measured coverage Description: JOB DUTIES: Work

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Contract

$72.51 - $77.51

Staff Engineer, CPU Design Verification

San Jose, California

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Today

Please Note: To provide the best candidate experience amidst our high application volumes, each candidate is limited to 10 applications across all open jobs within a 6-month period. Advancing the World's Technology Together Our technology solutions power the tools you use every day--including smartphones, electric vehicles, hyperscale data centers, IoT devices, and so much more. Here, you'll have an opportunity to be part of a global leader whose innovative designs are pushing the boundaries o

Full-time

USD 157,000.00 - 243,000.00 per year

Custom SOC IP Verification Engineer

Santa Clara, California

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Today

NVIDIA is seeking a Senior Custom SOC/IP Verification Engineer to verify the next generation SoC and IP solutions! We are looking for special individuals with desire to deliver innovative products. Together, we will build the next generation of life changing custom SOCs! If you are a motivated individual that understands how complex SOC and IPs are built, has intimate knowledge of client requirements, and understand various development cycles, this is your place to be. This role specifically req

Full-time

USD 168,000.00 per year

ASIC Verification Engineer

San Jose, California

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Today

Please Note: 1. If you are a first time user, please create your candidate login account before you apply for a job. (Click Sign In > Create Account) 2. If you already have a Candidate Account, please Sign-In before you apply. Job Description: Job duties: Functional verification of complex designs, especially external interfacing IPs/memory controllers.Responsible for all aspects of verification from test planning, test bench development, test execution and functional/code coverage closure.

Full-time

USD 119,000.00 - 190,000.00 per year

FPGA/ASIC Verification Engineer (Silicon Engineering)

Sunnyvale, California

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Today

SpaceX was founded under the belief that a future where humanity is out exploring the stars is fundamentally more exciting than one where we are not. Today SpaceX is actively developing the technologies to make this possible, with the ultimate goal of enabling human life on Mars. FPGA/ASIC VERIFICATION ENGINEER (SILICON ENGINEERING) At SpaceX we're leveraging our experience in building rockets and spacecraft to deploy Starlink, the world's most advanced broadband internet system. Starlink is th

Full-time

USD 130,000.00 - 155,000.00 per year

Wireless Modem Verification Engineer (Silicon Engineering)

Irvine, California

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Today

SpaceX was founded under the belief that a future where humanity is out exploring the stars is fundamentally more exciting than one where we are not. Today SpaceX is actively developing the technologies to make this possible, with the ultimate goal of enabling human life on Mars. WIRELESS MODEM VERIFICATION ENGINEER (SILICON ENGINEERING) At SpaceX we're leveraging our experience in building rockets and spacecraft to deploy Starlink, the world's most advanced broadband internet system. Starlink

Full-time

USD 120,000.00 - 145,000.00 per year

MTS Systems Design Engineer

San Jose, California

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Today

WHAT YOU DO AT AMD CHANGES EVERYTHING We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences - the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world's most important challenges. We strive for execution excellenc

Full-time

USD 137,900.00 per year

ASIC Verification Engineer

Santa Clara, California

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Today

Full-time

USD 119,000.00 per year

IC Verification Engineer

San Jose, California

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Today

Please Note: 1. If you are a first time user, please create your candidate login account before you apply for a job. (Click Sign In > Create Account) 2. If you already have a Candidate Account, please Sign-In before you apply. Job Description: Job duties include: Architect and develop scalable and reusable Testbench environment using the framework of Verification Methodologies. Drive Test plans for all features for Block/Core/SOC and Write Functional coverage for these features. Build pseudo

Full-time

USD 141,000.00 per year

Camera DV Engineer

San Diego, California

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Today

Company: Qualcomm Technologies, Inc. Job Area: Engineering Group, Engineering Group > Camera Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Camera Engineer you will work on ideas that touch our daily life - creating everlasting connected memories and assist in building innovative devices thr

Full-time

USD 211,900.00 - 317,900.00 per year

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