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Santa Clara, California

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Today

Company: Qualcomm Technologies, Inc. Job Area: Engineering Group, Engineering Group > CPU Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a DFT Engineer you will work with chip architects, chip designers, implementation engineers and test engineers to verify the DFT and DFD (Design for Debug) architectu

Full-time

USD 142,200.00 - 213,400.00 per year

Senior DFT Engineer

Santa Clara, California

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Today

NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. More recently, GPU deep learning ignited modern AI - the next era of computing. NVIDIA is a "learning machine" that constantly evolves by adapting to new opportunities that are hard to solve, that only we can tackle, and that matter to the world. This is our life's work, to amplify human

Full-time

USD 168,000.00 per year

DFT Engineer (Server)

San Diego, California

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Today

Company: Qualcomm Technologies, Inc. Job Area: Engineering Group, Engineering Group > ASICS Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives communication and data processing transformation to help create a smarter, connected future for all. The Digital ASIC Design Team is currently seeking candidates who will be responsible for the implementation and verification of advanced DFT/

Full-time

USD 164,000.00 - 246,000.00 per year

Senior DFT Methodology Engineer

Santa Clara, California

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Today

Full-time

USD 136,000.00 per year

DFT/DFD Verification Engineer - Advanced SoC Projects

Remote or Santa Clara, California

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Today

DFT/DFD Verification Engineer Advanced SoC Projects We are looking for a seasoned Design-for-Test / Design-for-Debug Verification Engineer focused on validating sophisticated test and debug logic within next-generation SoCs. This position involves verifying scan architectures such as JTAG, iJTAG, and other internal debug features to support robust manufacturing testability and effective post-silicon debugging. The role will require tight collaboration with engineering teams across design, integ

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Full-time

$50-80

DFT Lead Engineer

California

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Yesterday

Role: DFT Lead Engineer Location: California (Relocation is fine) EXP: 7 to 10 yrs 1. Good experience in Scan insertion and ATPG (Cadence tools) 2. Good experience in RTL MBIST insertion using Cadence tools (PMBIST) 3. Good Knowledge on JTAG for Boundary scan and IP testing.

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Third Party

Distinguished Engineer, Test Engineering - DFT Operations Interface and IP Test Methodology

Irvine, California

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Today

About Marvell Marvell's semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, automotive, and carrier architectures, our innovative technology is enabling new possibilities. At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and be

Full-time

USD 178,600.00 - 264,290.00 per year

DFT Methodology - Data Analytics Engineer

Santa Clara, California

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Today

NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. More recently, GPU deep learning ignited modern AI - the next era of computing. NVIDIA is a "learning machine" that constantly evolves by adapting to new opportunities that are hard to solve, that only we can address, and that matter to the world. This is our life's work, to amplify huma

Full-time

USD 116,000.00 per year

Tester with PCB DFT

Santa Clara, California

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Today

Keywords : Automation testing, DFT, Manufacturing testing, Test fixture design, Board Bring up, failure mode tracking JD : 1. Work on PCB DFT w.r.t. ICT fixture design with maximum coverage 2. Boundary scan development (x1149 analyzer) with maximum coverage 3. Take care of Functional Test Coverage by Reviewing schematics and providing MFG test requirements to the Diagnostic team to verify all HW components. (maximum coverage) 4. Work with the HW team for board bring up and document all failure

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Third Party, Contract

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