We are now looking for a Senior ASIC Verification Engineer for our Coherent High Speed Interconnect team! For two decades, we have pioneered visual computing, the art and science of computer graphics. With our invention of the GPU - the engine of modern visual computing - the field has grown to encompass video games, movie production, product design, medical diagnosis, and scientific research. Today, we stand at the beginning of the next era, the AI computing era, ignited by a new computing mod

<>Key Responsibilities:Strong understanding of SV and UVM and good debugging skills.Understanding of AMBA protocols.Understand design specs and develop test plans based on functional and architectural requirementsBuild UVM/System Verilog-based verification environments for IP/subsystem/SoC level testingDevelop directed and random testcases, perform coverage analysis, and close functional/code coverageDebug simulation failures and work closely with RTL designers to resolve issuesExecute regressio

Title: Design Verification Engineer Location: Remote Duration: 12 months with possible extension Requirement: Good Design Verification Skill with major GLS work experience. Expertise in testbench updates for GLS Expertise in Scripting languages perl or python Experience with Make, Yaml & Json file systems. Experience with 0 delay simulations and post layout simulations with SDF back annotations (Best/Typical/Worst Case analysis). Good understanding of RTL synthesis , Static Timing Analysis &

A client of Innova Solutions is looking for an Design Verification Engineer. Position type: Contract Duration: 12+ Months Location: Mountain View, CA (Onsite Job) As a Design Verification Engineer, you will need: Minimum Qualifications: Experience in SV and UVM and good debugging skills.Understanding of AMBA protocols.Build UVM/System Verilog-based verification environments for IP/subsystem/SoC level testingDevelop directed and random testcases, perform coverage analysis, and close functional/co

Job Overview: We are seeking a Software Engineer with a strong foundation in Identity and Access Management across various domains such as Identity Governance, and Access Management. The ideal candidate will have hands-on experience with coding and scripting to work with APIs in IAM products and performing hands-on integration of Identity Verification tools. Key Responsibilities: * Design and implement IAM solutions across multiple IAM pillars, including Identity Governance, Access Management.

Position: Lead AMS Verification Engineer Location: Remote Duration: 1 Years Job Description: We are seeking highly skilled Lead AMS Verification Engineers to join our team. The ideal candidate will have extensive experience in AMS verification at both the SoC (chip) and block level, using netlist and/or models. This role requires a deep understanding of analog circuits, including low power circuits, PMIC, high-speed clocking circuits, and data converters. The candidate should also possess st

Good DV Skill with major GLS work experience. Expertise in testbench updates for GLS Expertise in Scripting languages perl or python Experience with Make, Yaml & Json file systems. Experience with 0 delay simulations and post layout simulations with SDF back annotations (Best/Typical/Worst Case analysis). Good understanding of RTL synthesis , Static Timing Analysis & LEC Flows. Experience with flow optimizations such as Grey/Black-boxing techniques Good at communicating requirements/issues wit

8+ years experience Strong in SV / UVM and full chip verification Networking protocol knowledge PCIe, Ethernet, CXL etc. Testbench creation & Scoreboarding

Design Verification Engineer Scope: Design and development of the IO subsystems for a high-performance SoC from scratch, working closely with the Architecture and RTL teams. Develop detailed block-level design specifications and plans for a high-performance IO Subsystem. Create and implement reusable block-level components in SV, UVM, and C++, including microarchitectural models, monitors, and checkers. Develop and optimize the IO subsystem design to ensure functionality and performance are in a

ASIC Verification Engineer Reviewing the product designs and noting likely points of failure. Designing verification methodology based on product designs and failure points. Determining testing environments and verification tools. Planning the method of sequence for testing operations. Instituting and tweaking testing mechanisms and protocols. Writing up final test procedures and training QC staff. Qualificatios Bachelor s or Master s in Electrical or Computer Science 4 years of Design Verificat

ASIC Verification Engineer Reviewing the product designs and noting likely points of failure. Designing verification methodology based on product designs and failure points. Determining testing environments and verification tools. Planning the method of sequence for testing operations. Instituting and tweaking testing mechanisms and protocols. Writing up final test procedures and training QC staff. Qualificatios Bachelor s or Master s in Electrical or Computer Science 4 years of Design Verificat

Quantum computing holds the promise of humanity's mastery over the natural world, but only if we can build a real quantum computer. PsiQuantum is on a mission to build the first real, useful quantum computers, capable of delivering the world-changing applications that the technology has long promised. We know that means we will need to build a system with roughly 1 million qubits that supports fault tolerant error correction within a scalable architecture, and a data center footprint. By harnes

Job Description Join Our Team as an ASIC & FPGA Lead Verification Engineer where you will support over 50 different programs and research and development (R&D) efforts, affecting technology across military space, civil space, commercial space, missiles, missile defense platforms, satellite surveillance platforms, deep space exploration, and manned flight missions. Location: This position does not support teleworking; the preferred candidate will be located near our Lockheed Martin Space facilit

Job Description Join Our Team as an ASIC & FPGA Verification Engineer where you will support over 50 different programs and research and development (R&D) efforts, affecting technology across military space, civil space, commercial space, missiles, missile defense platforms, satellite surveillance platforms, deep space exploration, and manned flight missions. Location: This position does not support teleworking; the preferred candidate will be located near our Lockheed Martin Space facility one

ASIC and/or FPGA Design & Verification Engineer (Lead, Senior or Principal) Company: The Boeing Company Boeing Space, Intelligence & Weapons Systems has an exciting opportunity for multiple ASIC and/or FPGA Design and Verification Engineers (Lead, Senior or Principal) to join us as part of our Boeing Electronic Products team at the heart of Boeing's products; ASICs and FPGAs in Fairfax, VA. From complex digitally beamformed phased arrays for constellation satellite programs to computing and n

ASIC and/or FPGA Design and Verification Engineer (Entry Level, Associate or Mid-Level) Company: The Boeing Company Boeing Space, Intelligence & Weapons Systems has an exciting opportunity for multiple ASIC and/or FPGA Design and Verification Engineers (Entry Level, Associate or Mid-Level) to join us as part of our Boeing Electronic Products team at the heart of Boeing's products; ASICs and FPGAs in Fairfax, VA. From complex digitally beamformed phased arrays for constellation satellite progr

We anticipate the application window for this opening will close on - 2 May 2025 At Medtronic you can begin a life-long career of exploration and innovation, while helping champion healthcare access and equity for all. You'll lead with purpose, breaking down barriers to innovation in a more connected, compassionate world. A Day in the Life In this exciting role as a Senior Product Test Engineer, you will be responsible for product verification and reliability test planning, designing, developi

Benefits: 401(k) 401(k) matching Relocation bonus Position: FMS Verification & Validation Engineer Location: Remote About the Role: We are seeking a skilled Verification Engineer with expertise in Flight Management Systems (FMS) The ideal candidate will have experience in verification and validation (V&V) processes for avionics systems, with a strong background in display, navigation, and application systems within FMS Skill Matrix: Yrs. In Flight Management Systems Yrs. In verification and v

We anticipate the application window for this opening will close on - 5 May 2025 At Medtronic you can begin a life-long career of exploration and innovation, while helping champion healthcare access and equity for all. You'll lead with purpose, breaking down barriers to innovation in a more connected, compassionate world. A Day in the Life Medtronic leads the health care industry to provide solutions that benefit the daily lives of people across the globe. Our organization contributes directly

Position : Design Verification Engineer Location: Remote Job Description : Good DV Skill with major GLS work experience. Expertise in testbench updates for GLS Expertise in Scripting languages perl or python Experience with Make, Yaml & Json file systems. Experience with 0 delay simulations and post layout simulations with SDF back annotations (Best/Typical/Worst Case analysis). Good understanding of RTL synthesis , Static Timing Analysis & LEC Flows. Experience with flow optimizations such as