Job Title: Product Design Engineer Job Location: Cupertino, CA Work Model: 3-days onsite and 2 days WFH Job Duration: 06+ month contract with possibility of extension Max Hourly Rate($): $110-115/hour on W2 + Benefits Key Qualifications: High degree of motivation, curiosity, passion and creativity Design intelligence: mechanical intuition, creative problem solving, spatial reasoning, attention to detail Engineering fundamentals: statics, strength of materials, material science, statistics Excell

Industrial Design Engineer Autonomous Vehicle Systems We are seeking an experienced Industrial Design Engineer to join a cross-functional team focused on delivering advanced hardware experiences for next-generation autonomous vehicle systems. This role sits at the intersection of industrial design, mechanical engineering, and studio development, ensuring that form, function, and manufacturability are balanced from concept through production. The Industrial Design Engineer will collaborate with

ASIC Design Engineer Location: Santa Clara, CA Onsite Contract Overview of the Role As an ASIC Design Engineer , you will play a crucial role in the development and optimization of our cutting-edge ASIC solutions. Your work will directly impact the efficiency, performance, and scalability of our products, driving forward the company's objectives and contributing to technological innovations that shape the industry. Detailed Responsibilities Run and manage Fusion Compiler, ICC II, and Innovus

Calling all innovators - find your future at Fiserv. We're Fiserv, a global leader in Fintech and payments, and we move money and information in a way that moves the world. We connect financial institutions, corporations, merchants and consumers to one another millions of times a day - quickly, reliably, and securely. Any time you swipe your credit card, pay through a mobile app, or withdraw money from the bank, we're involved. If you want to make an impact on a global scale, come make a differ

Calling all innovators - find your future at Fiserv. We're Fiserv, a global leader in Fintech and payments, and we move money and information in a way that moves the world. We connect financial institutions, corporations, merchants and consumers to one another millions of times a day - quickly, reliably, and securely. Any time you swipe your credit card, pay through a mobile app, or withdraw money from the bank, we're involved. If you want to make an impact on a global scale, come make a differ

Date Posted: 05/21/2025 Hiring Organization: Rose International Position Number: 483052 Industry: IT Company Job Title: Product Design Engineer Job Location: Cupertino, CA, USA, 95014 Work Model: Hybrid Employment Type: Temporary Estimated Duration (In months): 7 Min Hourly Rate($): 120.00 Max Hourly Rate($): 120.00 Must Have Skills/Attributes: 2D, 3D, CAD, Design, Drafting, Manufacturing Job Description Education: Bachelor's (BS) or MS in Mechanical Engineering or related field Key Qua

Title: DFX RTL Design Engineer - Hybrid Mandatory skills: RTL, RTL design, RTL checks, RTL coding, RTL implementation, Gbit SERDES, UCIe, PCIe I/F, DFX RTL coding, DFX RTL integration, Verilog, system verilog, lint, elab, CDC, RDC, SOC, JTAG, IJTAG, ICL, PDL, ATP, DFT, TAP controller, GPIO, ESD structures, IP, Synopsys VCS, Verdi, SOC, SDC development, UPF development, Spyglass, Spyglass bringup, Spyglass analysis, scan chain, scan insertion, scan readiness, test coverage gaps, silicon bring up

Role: PCB Design EngineerLocation: Santa Clara, CA ( Day 1 Onsite)Type: Fulltime/Contract to hire and subcon Job Description: Senior Electrical Engineer - Advanced Semiconductor Packaging and Integration Company OverviewJoin our team and be at the forefront of semiconductor technology innovation. We are looking for a highly skilled Senior Engineer to contribute to our cutting-edge projects in Advanced Semiconductor Packaging and AI. You will work alongside some of the brightest minds in the indu

RTL Design Engineer Looking for a solid RTL Design Engineer who has a strong background in supporting RISC-V houses. The primary technology will be focused around SOCs that are built around ML Accelerators. This person should have a solid background in RTL Design and also have an understanding of verification flows. This person should be a strong engineer and be able to come in and provide solid and consistent support with minimal hand holding or guidance. Required 7+ Years of RTL Design experi

Title: ASIC/RTL Design Engineer - Onsite Description: KEY RESPONSIBILITIES: Write micro-architecture documentation and own major portions of the design and implementation of blocks to meet functional, timing, area, and power requirements. Collaborate with architecture and hardware teams to understand the requirements. Work with verification and physical design teams to achieve high quality design and successful tape out. Design and implement logic functions that enable efficient test and debug.

Job Req ID: 26641 About Supermicro: Supermicro is a Top Tier provider of advanced server, storage, and networking solutions for Data Center, Cloud Computing, Enterprise IT, Hadoop/ Big Data, Hyperscale, HPC and IoT/Embedded customers worldwide. We are the #5 fastest growing company among the Silicon Valley Top 50 technology firms. Our unprecedented global expansion has provided us with the opportunity to offer a large number of new positions to the technology community. We seek talented, pass

Principal Digital Design Engineer A premier chip and silicon IP provider focused on accelerating and securing data is seeking an exceptional Principal Digital Design Engineer to join its Memory Interface Chip (MIC) team in San Jose, CA. This is an exciting opportunity to work alongside some of the industry s most innovative engineers on cutting-edge technology that drives faster and more secure data solutions. In this full-time role, the Principal Digital Design Engineer will report directly to

Key Responsibilities Aid in the establishment and management of packaging suppliers and related processes and procedures. Develop test plans and perform laboratory testing on products, packages, and packaging materials. Support the Product Life Cycle (PLC) process by defining Design For Transportability (DFT) requirements and influencing product design. Identify and execute continuous improvement initiatives and cost-saving activities. Develop and maintain global packaging standards and spe

Benefits: 401(k) 401(k) matching Relocation bonus Job Title: Front-End ASIC Design Engineer Job Description: Milpitas, CA Description: Responsibilities Include but are not Limited to: Ensure designs meet product Performance-Power-Area-Schedule requirements. Tasks may include Architecture / micro-Architecture; Logic Design; RTL integration and coding; Lint/CDC/DFT checks; Synthesis & supporting timing-closure; Contribute to and support Verification; Supporting Firmware and FPGA teams; Silicon

Job Description: Key Qualifications: Knowledge of EM or RF hardware or antenna design Knowledge of integration of wireless technologies such as cellular, GPS, Wifi, and NFC into products. Knowledge of electromagnetic / circuit simulation tools (HFSS/CST/ADS/Cadence) Hands-on experience with RF lab instrumentation Experience in Developing automation framework for running automated tests. C/C++, Python and shell code development Excellent interpersonal skills Education & Experience: BSEE or MSEE/

Company Overview KLA is a global leader in diversified electronics for the semiconductor manufacturing ecosystem. Virtually every electronic device in the world is produced using our technologies. No laptop, smartphone, wearable device, voice-controlled gadget, flexible screen, VR device or smart car would have made it into your hands without us. KLA invents systems and solutions for the manufacturing of wafers and reticles, integrated circuits, packaging, printed circuit boards and flat panel d

NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. More recently, GPU deep learning ignited modern AI - the next era of computing. NVIDIA is a "learning machine" that constantly evolves by adapting to new challenges that are hard to tackle, that only we can pursue, and that matter to the world. This is our life's work, to amplify human c

Location : San Jose Employment Type : Regular Job Code : A192968 Apply to this job Share this listing: Responsibilities Our Data Center Development team is responsible for building Internet Data Center and Network in the AMS region. Our work involves, but not limiting to, DC innovation, implementing advanced technologies and renewable energy to achieve carbon-neutrality, rapid project delivery, capacity planning, process and risk control, cost management, etc. Our team's goal is to provid

Job Req ID: 26156 About Supermicro: Supermicro is a Top Tier provider of advanced server, storage, and networking solutions for Data Center, Cloud Computing, Enterprise IT, Hadoop/ Big Data, Hyperscale, HPC and IoT/Embedded customers worldwide. We are the #5 fastest growing company among the Silicon Valley Top 50 technology firms. Our unprecedented global expansion has provided us with the opportunity to offer a large number of new positions to the technology community. We seek talented, pass

RTL Design Engineer Looking for a solid RTL Design Engineer who has a strong background in supporting RISC-V houses. The primary technology will be focused around SOCs that are built around ML Accelerators. This person should have a solid background in RTL Design and also have an understanding of verification flows. This person should be a strong engineer and be able to come in and provide solid and consistent support with minimal hand holding or guidance. Required 7+ Years of RTL Design experi