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Hybrid in Mountain View, California

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Yesterday

A client of Innova Solutions is immediately hiring a Design verification Engineer Position type: Contract Duration: Contract Location: Mountain View, CA (Hybrid) As a Design verification Engineer, you will need: Must-Have Skills: 9+ years of experience as Design Verification EngineerStrong understanding of SV and UVM and good debugging skills.Understanding of AMBA protocols.Understand design specs and develop test plans based on functional and architectural requirementsBuild UVM/System Verilog-

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Contract, Third Party

$82 - $87

Performance Modeling/Verification Engineer - Intermediate

Santa Clara, California

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Today

Job Description: Pay Range: $51.72hr - $58.62hr Develop, enhance, and maintain SystemC/TLM2 models for memory controllers, peripherals, and interconnects, ensuring they accuXXly simulate the behavior and performance characteristics of the hardware. CollaboXX with cross teams to integXX models into client tools used for system-level designs, ensuring proper functionality and performance. Identify bottlenecks and performance issues within models and work to optimize their performance to meet desig

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Contract

$$51.72hr - $58.62hr

Sr. Formal Verification Engineer, Dojo

Palo Alto, California

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Today

Tesla's Dojo Silicon Development Team is looking for a Formal Verification Engineer to develop and manage the formal verification and test environments, working closely with the architect, design, and simulation verification team to achieve high quality tape-out. We are looking for the best talent to work on state-of-the-art chip designs, where your limit is only your imagination. You will work with a team of highly talented engineers who are focused on advancing Tesla's AI mission. If you love

Full-time

USD 120,000.00 per year

Wireless Modem Verification Engineer (Silicon Engineering)

Irvine, California

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Today

SpaceX was founded under the belief that a future where humanity is out exploring the stars is fundamentally more exciting than one where we are not. Today SpaceX is actively developing the technologies to make this possible, with the ultimate goal of enabling human life on Mars. WIRELESS MODEM VERIFICATION ENGINEER (SILICON ENGINEERING) At SpaceX we're leveraging our experience in building rockets and spacecraft to deploy Starlink, the world's most advanced broadband internet system. Starlink

Full-time

USD 120,000.00 - 145,000.00 per year

AI HW Design Verification Engineer

Remote or Santa Clara, California

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Today

AI HW Design Verification Engineer Looking for a Senior Design Verification Engineer. This person will play a key role in quality and reliability of digital designs through comprehensive verification methodologies. This person should have a strong background in verification techniques/processes, problem solving skills, and skilled at delivering high quality designs. Scope: Develop & execute comprehensive verification strategies in order to validate complex digital designs, ensuring compliance w

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Full-time

USD70 - USD90 per hour, Benefits: 70-90/hr

FPGA/ASIC Verification Engineer (Silicon Engineering)

Sunnyvale, California

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Today

SpaceX was founded under the belief that a future where humanity is out exploring the stars is fundamentally more exciting than one where we are not. Today SpaceX is actively developing the technologies to make this possible, with the ultimate goal of enabling human life on Mars. FPGA/ASIC VERIFICATION ENGINEER (SILICON ENGINEERING) At SpaceX we're leveraging our experience in building rockets and spacecraft to deploy Starlink, the world's most advanced broadband internet system. Starlink is th

Full-time

USD 130,000.00 - 155,000.00 per year

Design verification Engineer

Remote or Hybrid in Mountain View, California

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7d ago

Minimum Qualifications: Design Verification Engineering ServicesTestbench development System Verilog Universal Methodology (UVM), Python, and C testsIntegration/development of C tests/Application Programming Interface (APIs) and software build flowIntegration of UVM testbenchesTest development and debug, including without limitation tests for functionality, power, performance, error, and connectivity, both for RTL and Gate Level Netlist Design Under Test, tests for functional and code coverage

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Contract

$70 - $80

Performance Modeling and Verification Engineer - Onsite

Santa Clara, California

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3d ago

Title: Performance Modeling and Verification Engineer - Onsite Mandatory skills: SystemC, TLM2, ASIC, ASIC development, software, firmware, hardware, C, C++, Linux, Linux Environment, debug, debug tools, Gdb, Valgrind, Perl, Makefiles, DPI, PLI, PCIe, AXI, Verilog, SystemVerilog, SystemC, memory controllers, peripherals, interconnects, system design, system testing, system debugging, performance models, performance issues, design specifications, SV, UVM Functional Verification, Performance Veri

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Contract

$55.71 - $60.71

Senior Design Verification Engineer - Ethernet PHY/PCS

Santa Clara, California

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14d ago

Job Title: Senior Design Verification Engineer - Ethernet PHY/PCS Location: Santa Clara, CA Job Type: Contract, Full-time Experience: 7+ years We're seeking an experienced Senior Design Verification Engineer with expertise in Ethernet PHY or PCS to join our team in Santa Clara, CA. Responsibilities: - Develop and execute verification plans for Ethernet PHY or PCS - Create and maintain testbenches and test suites - Collaborate with design engineers to resolve verification issues - Strong understa

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Contract, Third Party

$180,000 - $200,000

Principal Design Verification Engineer

Hybrid in San Jose, California

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3d ago

Principal Design Verification Engineer A leading chip and silicon IP provider focused on accelerating and securing data is looking to hire an outstanding Principal Design Verification Engineer to join its Memory Interface Chip (MIC) team in San Jose, CA. This role offers the chance to work alongside top engineering talent on innovative products that push the boundaries of speed and data security. As a Principal Design Verification Engineer, you ll play a critical role in the development of MIC p

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Full-time

$187,000 - $217,000

ASIC and/or FPGA Design & Verification Engineer (Lead, Senior or Principal)

Huntington Beach, California

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Today

ASIC and/or FPGA Design & Verification Engineer (Lead, Senior or Principal) Company: The Boeing Company Boeing Space, Intelligence & Weapons Systems has an exciting opportunity for multiple ASIC and/or FPGA Design and Verification Engineers (Lead, Senior or Principal) to join us as part of our Boeing Electronic Products team at the heart of Boeing's products; ASICs and FPGAs in Huntington Beach or El Segundo, CA. From complex digitally beamformed phased arrays for constellation satellite prog

Full-time

USD 126,650.00 - 171,350.00 per year

Design Verification Engineer

San Jose, California

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Today

Experience: 6 to 15+ years of experience. Job Requirements are as below: Architect block and full-chip verification environments using HVLs and constrained random techniques for SOCs with embedded CPUs and mixed signal interfaces. Requires UVM, System Verilog, SVA Develop test plans and coverage metrics from specifications and write block and chip-level tests in C,SV,UVM Debug RTL and Gate simulations and work with design engineers to verify fixes. Write diagnostics for validation of FPGA prot

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Full-time

Depends on Experience

ASIC/FPGA Lead Verification Engineer III

San Diego, California

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Today

Job Description Join Our Team as an ASIC & FPGA Lead Verification Engineer where you will support over 50 different programs and research and development (R&D) efforts, affecting technology across military space, civil space, commercial space, missiles, missile defense platforms, satellite surveillance platforms, deep space exploration, and manned flight missions. Location: Although this position does support some teleworking; the selected candidate will need to be located near our Lockheed Mar

Full-time

USD 93,200.00 - 164,450.00 per year

ASIC FPGA Design and Verification Engineer - (Experienced, Lead, or Senior) - MTV

Mountain View, California

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Today

ASIC FPGA Design and Verification Engineer - (Experienced, Lead, or Senior) - MTV Company: The Boeing Company Boeing Space, Intelligence & Weapons Systems has an exciting opportunity for multiple ASIC and/or FPGA Design and Verification Engineers (Experienced, Lead, or Senior) to join us as part of our Boeing Electronic Products team at the heart of Boeing's products; ASICs and FPGAs in Mountain View, CA. From complex digitally beamformed phased arrays for constellation satellite programs to c

Full-time

USD 104,550.00 - 141,450.00 per year

Principal Verification Engineer

Hybrid in San Jose, California

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3d ago

A leading chip and silicon IP provider is looking to hire a talented Principal Verification Engineer to join its Memory Interconnect Design team in either San Jose, CA or Morrisville, NC. This is a great opportunity to work alongside some of the industry's top engineers to help develop cutting-edge technologies that accelerate and secure data. In this full-time role, the Principal Verification Engineer will report to the Director of Design Engineering and take a key role in product development

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Full-time

$166,000 - $196,000

Design Verification Engineer

Mountain View, California

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11d ago

Job Description Strong understanding of SV and UVM and good debugging skills. Understanding of AMBA protocols. Understand design specs and develop test plans based on functional and architectural requirements Build UVM/System Verilog-based verification environments for IP/subsystem/SoC level testing Develop directed and random testcases, perform coverage analysis, and close functional/code coverage Debug simulation failures and work closely with RTL designers to resolve issues Execute regressio

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Contract

$60 - $80

Design Verification Engineer

Mountain View, California

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19d ago

A client of Innova Solutions is immediately hiring for a Design Verification Engineer Position type: Contract Location: Mountain View, CA-Onsite As a Design Verification Engineer, you will be responsible for: Job description: Strong understanding of SV and UVM and good debugging skills.Understanding of AMBA protocols.Understand design specs and develop test plans based on functional and architectural requirements.Build UVM/System Verilog-based verification environments for IP/subsystem/SoC leve

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Contract

$60 - $70

Staff Systems Verification Engineer

Pleasanton, California

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Today

Abbott is a global healthcare leader that helps people live more fully at all stages of life. Our portfolio of life-changing technologies spans the spectrum of healthcare, with leading businesses and products in diagnostics, medical devices, nutritionals and branded generic medicines. Our 114,000 colleagues serve people in more than 160 countries. Job Title Staff Systems Verification Engineer Working at Abbott At Abbott, you can do work that matters, grow, and learn, care for yourself and fa

Full-time

USD 112,000.00 - 224,000.00 per year

DFT/DFD Verification Engineer - Advanced SoC Projects

Remote or Santa Clara, California

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Today

DFT/DFD Verification Engineer Advanced SoC Projects We are looking for a seasoned Design-for-Test / Design-for-Debug Verification Engineer focused on validating sophisticated test and debug logic within next-generation SoCs. This position involves verifying scan architectures such as JTAG, iJTAG, and other internal debug features to support robust manufacturing testability and effective post-silicon debugging. The role will require tight collaboration with engineering teams across design, integ

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Full-time

$50-80

AI HW Design Verification Engineer

Remote or Santa Clara, California

•

Today

Easy Apply

Full-time

USD70 - USD90 per hour, Benefits: 70-90/hr

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