Boston, Massachusetts
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Today
Job Description Summary: Draper's Digital Design Team is seeking a motivated and experienced Principal UVM Digital Verification Engineer to tackle novel verification challenges in FPGAs and ASICs. In this role, you will apply modern verification strategies to complex digital and mixed-signal designs in the areas of embedded security, cryptography, signal and image processing, navigation and communications. Job Description: Duties/Responsibilities Independently drive solutions to complex problem
Full-time