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Physical Design Engineer

DASHKAR AI TECH SOLUTION INC

Remote • Today

Easy Apply

Third Party, Contract

50 - 70

Embedded Firmware Engineers

DASHKAR AI TECH SOLUTION INC

Remote • 2d ago

Easy Apply

Part-time

60 - 90

Job Details

Skills

Cadence
Physical Design
Advanced Node
N5
N3
Genus
Innovus
Synthesis

Summary

Role: Physical Design Contractor
Location: San Jose, CA or Austin, TX (Onsite)

Responsibilities

We are seeking a Physical Design contractor with strong synthesis and implementation expertise to support large, timing-critical designs at advanced technology nodes.

Key Responsibilities:

Perform synthesis using Cadence Genus for large, timing-challenged designs
Drive PPA (power, performance, area) optimization through synthesis and early implementation stages
Develop and refine floorplans using Cadence Innovus
Collaborate closely with RTL teams to provide timely feedback on design quality, constraints, and architectural tradeoffs
Partner with external P&R teams to iterate toward timing closure and PPA optimization
Identify and address timing bottlenecks early in the flow to improve convergence

Qualifications:

Proven experience with large-scale SoC or AI-class designs
At least 5 years of PD experience
Hands-on experience at advanced / cutting-edge technology nodes (e.g., N5, N3 or below)
Strong understanding of timing closure and correlation between synthesis and implementation
Hands-on experience with Cadence Genus and Innovus
Ability to work cross-functionally with RTL, architecture, PD, and external implementation teams

Employers have access to artificial intelligence language tools (“AI”) that help generate and enhance job descriptions and AI may have been used to create this description. The position description has been reviewed for accuracy and Dice believes it to correctly reflect the job opportunity.

Dice Id: 91173970
Position Id: 9128642
Posted 3 hours ago

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Contact the job poster

Vipin Kumar

Recruiter @ DASHKAR AI TECH SOLUTION INC

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Remote

•

6d ago

Job Title: Physical Design Engineer GPU / High-Performance SoC Location: Mountain View, CA (Full Onsite) Openings: 2 Job Description We are looking for an experienced Physical Design Engineer with hands-on experience in advanced semiconductor process nodes, particularly TSMC 3nm and/or 2nm, for high-performance SoC, GPU, or similar complex chip designs. The ideal candidate will have strong end-to-end physical design experience, from netlist to GDSII, along with expertise in PPA optimization, tim

Easy Apply

Contract

$60 - $80

VLSI Physical Designer

Remote

•

Today

WE ARE HIRING VLSI PHYSICAL DESIGNER Pay Rate: $60/Hour on W2 Job Title: VLSI Physical Designer Domain: VLSI / Semiconductor Location: Anywhere in the USA | Remote Job Description: We are looking for an experienced VLSI Physical Designer with strong expertise in RTL-to-GDSII implementation, physical design, timing closure, and signoff verification. Key Responsibilities: RTL-to-GDSII Implementation Synthesis, placement, and routing using Synopsys Fusion Compiler Block and S

Easy Apply

Third Party, Contract

$60 - $65

ASIC Design Lead / Senior Chip Design Engineer

Remote

•

7d ago

Role:ASIC Design Lead / Senior Chip Design Engineer Location:REMOTE Duration: 12 months Contract Job Description What Youll Do Architecture and Chip Definition Lead ASIC architecture development from high-level requirements and block diagrams. Work with system architects to define chip functionality, interfaces and performance goals. Write detailed specifications for chip components and subsystems. RTL Design and Synthesis Develop RTL designs and run synthesis with Synopsys Design Compiler. Tun

Easy Apply

Contract

95 - 105

Senior ASIC RTL Designer

Remote

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Today

The client is seeking a Senior ASIC RTL Design Engineer to own the microarchitecture and RTL design of complex, high-speed processor blocks. This role involves building IP from the ground up and taking blocks from initial specification through integration and working silicon.ResponsibilitiesDefine microarchitecture and develop synthesizable Verilog/SystemVerilog RTL for complex processor blocks.Own ground-up IP and block design from specification through RTL implementation, integration, and sili

Easy Apply

Contract

Depends on Experience