entry level verification engineer Jobs

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Junior verification engineer

Realtime Associates Ltd

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Jersey City, New Jersey, USA

Full-time

Job Title: Junior Verification Engineer Location: New Jersey Job Type: Contractor About AirSpanAirSpan is seeking a motivated Junior Verification Engineer to contribute to the validation and testing of FPGA designs. This role offers an opportunity to develop expertise in Universal Verification Methodology (UVM) and SystemVerilog while working alongside experienced engineers in a collaborative environment. Job DescriptionAs a Junior UVM SystemVerilog Verification Engineer, you will support the de
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Posted 20 days ago

Junior Verification Engineer

GlobalLogic Inc.

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Warren, New Jersey, USA

Contract, Third Party

Job Description: Assist in developing and implementing UVM-based verification plans for FPGA designs.Perform functional and regression testing for digital hardware components.Develop and maintain test benches, test cases, and automation scripts in System Verilog.Analyze test results, debug issues, and collaborate with senior engineers to resolve defects.Ensure compliance with industry standards and customer requirements.Document test procedures, results, and defect tracking.Continuously learn an