Wireless SoC Design Verification Engineer Jobs

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Design Verification EngineerJob Title - Design Verification Engineer

Vbeyond CorporationCompany Name - Vbeyond Corporation

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Contract, Third Party

Dear Candidates, Hope you are doing great!! Currently, we have a job opening for Design Verification Engineer with our client. If you are interested, then please reply to me with your updated resume or please call me at Role: Design Verification Engineer Work Location: Remote PST Contract Mandate : CPU/GPU Functional Verification Experience is Required. Responsibilities: Plan the verification of complex design IP/SoC like CPU/Core/GFX block. Develop tests using UVM. Identify and write functi

Design Verification EngineerJob Title - Design Verification Engineer

Covetus, LLCCompany Name - Covetus, LLC

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Mountain View, California, USA

Full-time

Job Title: Design Verification Engineer Location: Mountain View, CA (Onsite)At-least 10+ years of experience in System Verilog HVL and C++., processor verification.At-least 10+ year of experience in SV/UVM. SOC verification on FPGA.Strong PCIe expertise is mustPorting/Testing in FPGA & Emulation (Zebu) Hardware realization Platform is good to have, post silicon validation is good.Experience in complete verification cycle which includes development of test plan, BFM/Driver/Monitor/Scoreboard com

FPGA Design Verification EngineerJob Title - FPGA Design Verification Engineer

GENERAL DYNAMICS MISSION SYSTEMSCompany Name - GENERAL DYNAMICS MISSION SYSTEMS

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Dedham, Massachusetts, USA

Full-time

Basic Qualifications Requires a Bachelor's degree in Electrical or Computer Engineering, or a related Science, Engineering or Mathematics field. Also requires 5+ years of job-related experience, or a Master's degree plus 3 years of job-related experience. CLEARANCE REQUIREMENTS: Department of Defense Secret security clearance is required at time of hire. Applicants selected will be subject to a U.S. Government security investigation and must meet eligibility requirements for access to classified

Design Verification EngineerJob Title - Design Verification Engineer

JConnect IncCompany Name - JConnect Inc

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San Jose, California, USA

Full-time

Role: Design Verification Engineers (SoC-5, PCIe-5)Location: Bay AreaSalary: 160-240k (DOE) Free health insurancePTOs: 10 Business days (Including sick leaves) Key Skills: UVM, SoC, PCIe, High Bandwidth memory, Emulation (Zebu or Palladium) Job Description: Architect block and full-chip verification environments using HVLs and constrained random techniques for SOCs with embedded CPUs and mixed signal interfaces. Requires UVM, System Verilog, SVA Develop test plans and coverage metrics from speci

FPGA Design Verification EngineerJob Title - FPGA Design Verification Engineer

General Dynamics CorporationCompany Name - General Dynamics Corporation

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Dedham, Massachusetts, USA

Full-time

Responsibilities for this Position FPGA Design Verification Engineer ID: 2024-63819 USA-MA-Dedham Required Clearance: Secret Posted Date: 8/20/2024 Category: Engineering-Hardware Employment Type: Full Time Hiring Company: General Dynamics Mission Systems, Inc. Basic Qualifications Requires a Bachelors degree in Electrical or Computer Engineering, or a related Science, Engineering or Mathematics field. Also requires 5+ years of job-related experience, or a Master's degree plus 3 years o

Design Verification EngineerJob Title - Design Verification Engineer

Xoriant CorporationCompany Name - Xoriant Corporation

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San Jose, California, USA

Contract

Title: Design Verification Engineer Duration: 12 months contract (Possible Extension-Long Term Project) Rate: $90-$100/hr on W2 without benefits Location: Hybrid, working onsite at our San Jose office 3 days per week Description As a GPU Design Verification Engineer, your talents will ensure the quality at the heart of our GPU architecture.Creativity is a necessity to overcome the challenges inherent to verifying the proper operation of our low-power GPU.Versatility and broad knowledge of stat

Design Verification EngineerJob Title - Design Verification Engineer

Avanciers LLCCompany Name - Avanciers LLC

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Austin, Texas, USA

Full-time

Design Verification Engineering ServicesTestbench development System Verilog Universal Methodology ( UVM ), Python, and C testsIntegration/development of C tests/Application Programming Interface ( APIs ) and software build flowIntegration of UVM testbenchesTest development and debug, including without limitation tests for functionality, power, performance, error, and connectivity, both for RTL and Gate Level Netlist Design Under Test, tests for functional and code coverage improvementsContinuou

Design Verification EngineerJob Title - Design Verification Engineer

Mirafra IncCompany Name - Mirafra Inc

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San Jose, California, USA

Full-time

Role: Design Verification Engineer Location: San Jose CA Job Description: Architect block and full-chip verification environments using HVLs and constrained random techniques for SOCs with embedded CPUs and mixed signal interfaces. Requires UVM, System Verilog, SVA Develop test plans and coverage metrics from specifications and write block and chip-level tests in C,SV,UVM Debug RTL and Gate simulations and work with design engineers to verify fixes. Write diagnostics for validation of FPGA p

SoC Design Verification EngineerJob Title - SoC Design Verification Engineer

AMD (Advanced Micro Devices)Company Name - AMD (Advanced Micro Devices)

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Boxborough, Massachusetts, USA

Full-time

WHAT YOU DO AT AMD CHANGES EVERYTHING \r\n We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences - the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world's most important challenges. We strive for execution ex

Design Verification Engineer-100 % remoteJob Title - Design Verification Engineer-100 % remote

SaksoftCompany Name - Saksoft

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Remote

Third Party, Contract

Plan the verification of complex design IP/SoC like CPU/Core/GFX block.Develop tests using UVM.Identify and write functional coverage for stimulus and corner cases.Analyze and debug test failures with designers to deliver functionally correct design.Assembly tests for any ISA is strongly desired but not required.Close coverage to plug verification holes and meet tape-out requirements.IP integration DV.Stimulus generation tools development and automation.Qualifications: Experience in design verif

Cellular SOC Design Verification EngineerJob Title - Cellular SOC Design Verification Engineer

Apple, Inc.Company Name - Apple, Inc.

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Sunnyvale, California, USA

Full-time

Summary Do you have a passion for invention and self-challenge? This position allows you to be a part of one of the most innovative and key projects that Apple's Silicon Engineering Group has embarked upon to date.As part of our team, you will have the opportunity to take the lead and contribute to verifying a set of sophisticated SOCs. This team will allow you to integrate multiple sophisticated IP-level DV environments, craft highly reusable outstanding UVM TB, implement effective coverage-dr

Design Verification EngineerJob Title - Design Verification Engineer

Apple, Inc.Company Name - Apple, Inc.

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Cupertino, California, USA

Full-time

Summary Join an accomplished team at Apple developing custom integrated circuits for Apple's existing and future product lines. As a member of our mixed signal ASIC team, you will be responsible for verifying complex digital IP's. You will work with the system architects and digital designers, making block level specifications clear and precise. You will use the specifications to build verification plans to exercise the functional, performance, stress cases, and error conditions in your blocks.

Principal Design Verification EngineerJob Title - Principal Design Verification Engineer

Microsoft CorporationCompany Name - Microsoft Corporation

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Mountain View, California, USA

Full-time

Microsoft is a highly innovative company that collaborates across disciplines to produce cutting edge technology that changes our world. Microsoft's Silicon team builds custom silicon for a diverse set of systems ranging from innovative consumer products like Xbox to high-performance Azure cloud servers, clients, and augmented reality. We are looking for a Principal Design Verification Engineer to work in the dynamic Microsoft Artificial Intelligence Silicon Engineering (AISiE) team. The candi

FPGA Design Verification EngineerJob Title - FPGA Design Verification Engineer

General DynamicsCompany Name - General Dynamics

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Dedham, Massachusetts, USA

Full-time

Principal Design Verification engineerJob Title - Principal Design Verification engineer

Marvell Semiconductor Inc.Company Name - Marvell Semiconductor Inc.

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Santa Clara, California, USA

Full-time

About Marvell Marvell's semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, automotive, and carrier architectures, our innovative technology is enabling new possibilities. At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and be

Design Verification Engineer, PrincipalJob Title - Design Verification Engineer, Principal

Marvell Semiconductor Inc.Company Name - Marvell Semiconductor Inc.

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Santa Clara, California, USA

Full-time

Senior Design Verification EngineerJob Title - Senior Design Verification Engineer

Microsoft CorporationCompany Name - Microsoft Corporation

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Austin, Texas, USA

Full-time

The Artificial Intelligence Silicon Engineering team is seeking a Senior Design Verification Engineer to deliver premium-quality designs once considered impossible. We are responsible for delivering cutting-edge AI designs that can perform complex and high-performance functions in an extremely efficient manner. We are looking for a Senior Design Verification Engineer to work in the dynamic Microsoft Artificial Intelligence System on Chip (AISoC) Silicon team. The candidate should be a self-start

Principal Design Verification EngineerJob Title - Principal Design Verification Engineer

Marvell Semiconductor Inc.Company Name - Marvell Semiconductor Inc.

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Westborough, Massachusetts, USA

Full-time

Asic Design Verification EngineerJob Title - Asic Design Verification Engineer

Broadcom CorporationCompany Name - Broadcom Corporation

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San Jose, California, USA

Full-time

Please Note: 1. If you are a first time user, please create your candidate login account before you apply for a job. (Click Sign In > Create Account) 2. If you already have a Candidate Account, please Sign-In before you apply. Job Description: You will contribute to the development of complex SOCs targeted towards Touch Controllers/Wireless Charging Chips and other new initiatives. As a verification engineer, your responsibilities will include: ? Architect block and full-chip verification envir

Principal Design Verification EngineerJob Title - Principal Design Verification Engineer

Marvell Semiconductor Inc.Company Name - Marvell Semiconductor Inc.

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Santa Clara, California, USA

Full-time