Verification Engineer Jobs in Milpitas, CA

1 - 20 of 61 Jobs

Onsite Mid-level Verification Engineer, UVM, SystemVerilogJob Title - Onsite Mid-level Verification Engineer, UVM, SystemVerilog

Intelliswift Software IncCompany Name - Intelliswift Software Inc

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Newark, California, USA

Contract

Mid-level Verification Engineer with 5-8 years of experience of pure verification in FPGA. This is a pure Verification Engineer role. This position is onsite in the greater San Jose Bay Area. What you will be doing: Purely verification of FPGAProgramming using SystemVerilogDevelop OO testbench infrastructureDevelop test cases using UVMScripting What you will need: 5-8 years in pure VerificationSolid in SystemVerilog programmingExperience with UVM, Universal Verification MethodologyExperience

Design Verification EngineerJob Title - Design Verification Engineer

SivaltechCompany Name - Sivaltech

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Santa Clara, California, USA

Contract, Third Party

Job Title: Design Verification Engineer (DV) Company: Sivaltech Location: Santa Clara, CA Job Type: Full-time About Sivaltech: Sivaltech is a leading technology company driving innovation in the industry. We're seeking an experienced Design Verification Engineer to join our team in Santa Clara, CA. Job Description: As a Design Verification Engineer, you'll develop and execute verification plans for complex digital designs, focusing on Ethernet PHY or PCS. You'll work closely with cross-functiona

Design Verification Engineer- Mountain View, CA (Hybrid)Job Title - Design Verification Engineer- Mountain View, CA (Hybrid)

Avtech SolutionsCompany Name - Avtech Solutions

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Mountain View, California, USA

Full-time

Role: Design Verification Engineer Location: Mountain View, CA (Hybrid) Hire Type: Contract Job Description Design Verification Engineer Key Responsibilities: 08-14 Years Experience Strong understanding of SV and UVM and good debugging skills. Understanding of AMBA protocols. Understand design specs and develop test plans based on functional and architectural requirements Build UVM/System Verilog-based verification environments for IP/subsystem/SoC level testing Develop directed and random

Verification EngineerJob Title - Verification Engineer

SGS ConsultingCompany Name - SGS Consulting

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Sunnyvale, California, USA

Contract

Summary: The main function of the Verification Engineer is to work with a group of researchers and engineers to own the electrical system level verification of Client s products.Working closely with researchers, architects, and designers in architecting methods of electrical verification for multiple state of the art systems.Using verification skills to define verification requirements, create test cases, design and implement the testing infrastructure, execute the testing, and report the result

Verification EngineerJob Title - Verification Engineer

Mice GroupsCompany Name - Mice Groups

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Sunnyvale, California, USA

Contract

Mandatory Experience: 7 + years experience in architecting and implementing Design Verification infrastructure and executing the complete verification cycleExperience in the development of UVM based verification environments from scratchExperience with Design verification of Data-center applications like Video, AI/ML, and Networking designsMinimum Qualifications B.S or M.S degree in Electrical Engineering, Computer Engineering or Computer ScienceHands-on experience in Verilog, System Verilog, C/

IC Verification EngineerJob Title - IC Verification Engineer

Broadcom CorporationCompany Name - Broadcom Corporation

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San Jose, California, USA

Full-time

Please Note: 1. If you are a first time user, please create your candidate login account before you apply for a job. (Click Sign In > Create Account) 2. If you already have a Candidate Account, please Sign-In before you apply. Job Description: Job duties include: Develop Test plans for all features for Block/Core/SOC and Write Functional coverage for these features. Architect and develop scalable and re-usable testbenches, using the framework of the verification methodology Build pseudo-rand

Verification EngineerJob Title - Verification Engineer

SPECTRAFORCE TECHNOLOGIES Inc.Company Name - SPECTRAFORCE TECHNOLOGIES Inc.

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Sunnyvale, California, USA

Contract

Verification Engineer IV Sunnyvale CA (Onsite) 6 months (Possible extension) Job Description Summary: The main function of the Verification Engineer is to work with a group of researchers and engineers to own the electrical system-level verification of Client's products.The role involves working closely with researchers, architects, and designers to develop methods of electrical verification for multiple state-of-the-art systems.The engineer will define verification requirements, create test ca

Design Verification EngineerJob Title - Design Verification Engineer

Mirafra IncCompany Name - Mirafra Inc

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San Jose, California, USA

Full-time

Experience: 6 to 15+ years of experience. Job Requirements are as below: Architect block and full-chip verification environments using HVLs and constrained random techniques for SOCs with embedded CPUs and mixed signal interfaces. Requires UVM, System Verilog, SVA Develop test plans and coverage metrics from specifications and write block and chip-level tests in C,SV,UVM Debug RTL and Gate simulations and work with design engineers to verify fixes. Write diagnostics for validation of FPGA prot

ASIC Verification Engineer - GPUJob Title - ASIC Verification Engineer - GPU

NVIDIA CorporationCompany Name - NVIDIA Corporation

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Santa Clara, California, USA

Full-time

NVIDIA is seeking elite ASIC Verification Engineers to verify the design and implementation of the world's leading SoC's and GPU's. This position offers the opportunity to have real impact in a dynamic, technology-focused company impacting product lines ranging from consumer graphics to self-driving cars and the growing field of artificial intelligence. We have crafted a team of extraordinary people stretching around the globe, whose mission is to push the frontiers of what is possible today and

Design Verification EngineerJob Title - Design Verification Engineer

Innova Solutions, IncCompany Name - Innova Solutions, Inc

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Remote or Mountain View, California, USA

Contract, Third Party

A client of Innova Solutions is looking for an Design Verification Engineer. Position type: Contract Duration: 12+ Months Location: Mountain View, CA (Onsite Job) As a Design Verification Engineer, you will need: Minimum Qualifications: Experience in SV and UVM and good debugging skills.Understanding of AMBA protocols.Build UVM/System Verilog-based verification environments for IP/subsystem/SoC level testingDevelop directed and random testcases, perform coverage analysis, and close functional/co

ASIC Verification Engineer - DMA/PCIeJob Title - ASIC Verification Engineer - DMA/PCIe

AMD (Advanced Micro Devices)Company Name - AMD (Advanced Micro Devices)

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Santa Clara, California, USA

Full-time

WHAT YOU DO AT AMD CHANGES EVERYTHING We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences - the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world's most important challenges. We strive for execution excellenc

Design Verification EngineerJob Title - Design Verification Engineer

Mindsource IncCompany Name - Mindsource Inc

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Sunnyvale, California, USA

Contract

Title: Sr. Design Verification Engineer Location: Onsite - Sunnyvale, CA (or) Austin, TX Duration: Long-term Type: Contract (W2/C2C) Rate: $110-$115/hr Responsibilities: Define and implement IP/SoC verification plans, build verification test benches to enable IP/sub-system/SoC level verification Develop functional tests based on verification test plan Drive Design Verification to closure based on defined verification metrics on test plan, functional and code coverage Debug, root-cause, and resol

Senior ASIC Verification Engineer - GPUJob Title - Senior ASIC Verification Engineer - GPU

NVIDIA CorporationCompany Name - NVIDIA Corporation

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Santa Clara, California, USA

Full-time

NVIDIA is seeking best-in-class ASIC Verification Engineers to verify the world's leading GPUs. In this role, you will be doing unit level verification of the process scheduling and system interface hardware of the GPU. This position will be working across many NVIDIA teams from software, to architecture, design, methodology, and more. The GPU is used in applications from consumer graphics, through self-driving cars, to artificial intelligence, all of which you will be involved in and learn abou

Senior System Verification EngineerJob Title - Senior System Verification Engineer

NVIDIA CorporationCompany Name - NVIDIA Corporation

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Santa Clara, California, USA

Full-time

NVIDIA is looking for a Senior System Verification Engineer to join our Emulation division. We are a worldwide recognized division noted for groundbreaking technology. We are work-flex, family and diverse team! NVIDIA invention of the GPU in 1999 accelerated the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. More recently, GPU deep learning ignited modern AI - the next era of computing. NVIDIA is a "learning machine" that constantly evo

Design Verification Engineer at Santa Clara, CA (Hybrid)Job Title - Design Verification Engineer at Santa Clara, CA (Hybrid)

Infobahn Softworld Inc.Company Name - Infobahn Softworld Inc.

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Santa Clara, California, USA

Third Party, Contract

Role Title: Design Verification Engineer Location: Santa Clara, CA, 95054 (Hybrid 3 days a week) Duration: 12+ months contract Job Duties: Participate in the functional verification of a block(s) of complex ASICs and/or IP cores for an I/O SOC. Be part of a team of design verification team, working closely with other team members to understand and verify the functionality of a given design element within the context of the block, chip and overall system. Candidate will be participating in the

Senior ASIC Verification Engineer, Coherent High Speed InterconnectJob Title - Senior ASIC Verification Engineer, Coherent High Speed Interconnect

NVIDIA CorporationCompany Name - NVIDIA Corporation

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Remote or Santa Clara, California, USA

Full-time

We are now looking for a Senior ASIC Verification Engineer for our Coherent High Speed Interconnect team! For two decades, we have pioneered visual computing, the art and science of computer graphics. With our invention of the GPU - the engine of modern visual computing - the field has grown to encompass video games, movie production, product design, medical diagnosis, and scientific research. Today, we stand at the beginning of the next era, the AI computing era, ignited by a new computing mod

Senior Principal Verification EngineerJob Title - Senior Principal Verification Engineer

Marvell Semiconductor Inc.Company Name - Marvell Semiconductor Inc.

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Santa Clara, California, USA

Full-time

About Marvell Marvell's semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, automotive, and carrier architectures, our innovative technology is enabling new possibilities. At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and be

Mixed-Signal Design Verification EngineerJob Title - Mixed-Signal Design Verification Engineer

Talent Junction, LLC.Company Name - Talent Junction, LLC.

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San Jose, California, USA

Third Party, Contract

Title: Mixed-Signal Design Verification Engineer Location: San Jose, CA Key Technical Skills:UVM/System Verilog, Python, Synopsys/Cadence EDA Verifications Tools, AMS Verification Required Experience/Skills: Good knowledge of System-Verilog RTL coding including state machines, adders, multipliers, combinatorial logic, etc. Good understanding of digital design for mixed signal control loops and designing Verilog / Verilog- A code to control analog circuits (e.g. bandgap, PLL, Amplifier, Filters

Design Verification Engineer || Mountain View, CA (Onsite)Job Title - Design Verification Engineer || Mountain View, CA (Onsite)

E-Solutions, Inc.Company Name - E-Solutions, Inc.

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Mountain View, California, USA

Full-time

Job Role- Design Verification Engineer Location- Mountain View, CA (Onsite) Job Descriptions- Key Responsibilities: Strong understanding of SV and UVM and good debugging skills. Understanding of AMBA protocols. Understand design specs and develop test plans based on functional and architectural requirements Build UVM/System Verilog-based verification environments for IP/subsystem/SoC level testing Develop directed and random testcases, perform coverage analysis, and close functional/code cover

ASIC Verification EngineerJob Title - ASIC Verification Engineer

Cisco Systems, Inc.Company Name - Cisco Systems, Inc.

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San Jose, California, USA

Full-time

The application window has been extended and is expected to close on 04/29/2025 Job posting may be removed earlier if the position is filled or if a sufficient number of applications are received. Meet the Team The Common Hardware Group (CHG) delivers the silicon, optics, and hardware platforms for Cisco's core Switching, Routing, and Wireless products. We design the networking hardware for Enterprises and Service Providers of various sizes, the Public Sector, and Non-Profit Organizations acro