RFIC - PLL Design Engineer Jobs in San Jose, CA

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Senior RFIC Design Engineer

Apple, Inc.

Sunnyvale, California, USA

Full-time

Summary Would you like to join Apple's growing wireless silicon development team? The wireless RFIC team architects, designs, and validates radio transceivers integrated into complex wireless SoCs. Our wireless organization is responsible for all aspects of wireless silicon development that transform the user experience at the product level, all of which is driven by a best-in-class vertically integrated engineering team spanning RF/Analog architecture and design, Systems/PHY/MAC architecture a

RFIC Design Engineer

Apple, Inc.

Sunnyvale, California, USA

Full-time

Summary Would you like to join Apple's growing wireless silicon development team? The wireless RFIC team architects, designs, and validates radio transceivers integrated into complex wireless SoCs. Our wireless organization is responsible for all aspects of wireless silicon development that transform the user experience at the product level, all of which is driven by a best-in-class vertically integrated engineering team spanning RF/Analog architecture and design, Systems/PHY/MAC architecture a

RFIC Layout Engineer

Apple, Inc.

Sunnyvale, California, USA

Full-time

Summary The Wireless SoC Radio Team designs state-of-art highly energy efficient CMOS radios, from RF to bits. To deliver these radios, our team is responsible for the design of a wide range of RF, analog, and mixed-signal blocks from RF front-end amplifiers to data converters, including baseband filters, baseband and RF phase-locked loops, crystal oscillators, and bandgap references. We are working on new technologies that transform the user experience at the product level, all of which is dri

RFIC Design Validation Test Engineer

Apple, Inc.

Sunnyvale, California, USA

Full-time

Summary The Wireless SoC Radio Team designs state-of-art highly energy efficient CMOS radios, from RF to bits. To deliver these radios, our team is responsible for the design and validation of a wide range of RF, analog, and mixed-signal blocks from RF front-end amplifiers to data converters, including baseband filters, baseband and RF phase-locked loops, crystal oscillators, and bandgap references. We are working on new technologies that transform the user experience at the product level, all

RFIC Design Validation Test Engineer

Apple, Inc.

Sunnyvale, California, USA

Full-time

Summary The Wireless SoC Radio Team designs state-of-art highly energy efficient CMOS radios, from RF to bits. To deliver these radios, our team is responsible for the design and validation of a wide range of RF, analog, and mixed-signal blocks from RF front-end amplifiers to data converters, including baseband filters, baseband and RF phase-locked loops, crystal oscillators, and bandgap references. We are working on new technologies that transform the user experience at the product level, all

Senior RFIC Design Validation Test Engineer

Apple, Inc.

Sunnyvale, California, USA

Full-time

Summary The Wireless SoC Radio Team designs state-of-art highly energy efficient CMOS radios, from RF to bits. To deliver these radios, our team is responsible for the design and validation of a wide range of RF, analog, and mixed-signal blocks from RF front-end amplifiers to data converters, including baseband filters, baseband and RF phase-locked loops, crystal oscillators, and bandgap references. We are working on new technologies that transform the user experience at the product level, all

Sr. RFIC Layout Engineer

Apple, Inc.

Sunnyvale, California, USA

Full-time

Summary The Wireless SoC Radio Team designs state-of-art highly energy efficient CMOS radios, from RF to bits. To deliver these radios, our team is responsible for the design of a wide range of RF, analog, and mixed-signal blocks from RF front-end amplifiers to data converters, including baseband filters, baseband and RF phase-locked loops, crystal oscillators, and bandgap references. We are working on new technologies that transform the user experience at the product level, all of which is dri

RFIC Test Engineer

Apple, Inc.

Sunnyvale, California, USA

Full-time

Summary The wireless RFIC team architects, designs, and validates radio transceivers integrated into complex wireless SoCs. Our transceivers have powered wireless connectivity solutions for Apple wearable products, enabling the smallest form factor at the lowest power envelope. You will have the opportunity to do innovative development in transceiver design while working closely with systems and product teams at Apple.In this role, you will be part of an RFIC design team and perform test, debug

Sr. RFIC Test Engineer

Apple, Inc.

Sunnyvale, California, USA

Full-time

Summary The wireless RFIC team architects, designs, and validates radio transceivers integrated into complex wireless SoCs. Our transceivers have powered wireless connectivity solutions for Apple wearable products, enabling the smallest form factor at the lowest power envelope. You will have the opportunity to do innovative development in transceiver design while working closely with systems and product teams at Apple.In this role, you will be part of an RFIC design team and perform test, debug

RTL ASIC Design Engineer

Innova Solutions, Inc

Mountain View, California, USA

Full-time

Innova Solutions is immediately hiring a RTL ASIC Design Engineer Position type: Full Time. Duration: Full Time Location: Mountain View , CA (Onsite) As a RTL ASIC Design Engineer, you will: Minimum Qualifications: looking for RTL ASIC Design engineer with some storage backgroundLogic design /micro-architecture / RTL coding is a must.Expertise in Verilog & System Verilog is a must.Experience in Synthesis / Understanding of timing concepts for ASIC is required.Experience in design of DDR / USB /S

Physical Design STA Engineer

Xoriant Corporation

San Jose, California, USA

Contract

Hi, This is Himanshu from Xoriant, sharing the below job description for one of our open requirements, please have a look and let me know your valuable feedback along with your updated resume and best time to reach you. Job Position: Physical Design STA Engineer Job Location: San Jose, CA (Hybrid) Job Duration: 6+ Months Contract Job Description: Sr. STA Engineer with15+ years experience for STA position (Physical Design Static Timing Analysis / STA Engineer).Perform static timing analysis (ST

Senior Mask Layout Engineer

Technical Link

San Jose, California, USA

Contract

Location: San Jose, CA (Must be on-site) LOA: 6-12 months Skills: Analog Layout 7nm/5nm FInFET, TSMC, RF, High Speed, PLL, Serdes Location: San Jose, CA Analog and Mixed-Signal Layout Engineer Job Description The candidate should be able work independently on block level and IP level Analog layout design, coordinating with the circuit designer and the rest of the layout team. The candidate will need to be able to work with both design engineers and mask design engineers in remote locations, and

Hardware Design Engineer 5

WinMax Systems Corporation

Mountain View, California, USA

Contract

Title: Hardware Design Engineer 5Location: Mountain View, CA (onsite)Contract: 6+ Month Job Description: Candidate Requirements - 10+ overall years of experience in the design verification - Hands-on experience with UVM, Testbench Test case coding - Working experience with System Verilog and C languages - AXI and PCIE protocol experience is plus - Good Communication skills and team player Degrees or certifications required: Bachelors degree in computer science or electrical engineering or relat

Controls Design Engineer ( waiting for feedback on subs)

Ledgent Technology

Pleasanton, California, USA

Full-time

Job Title: Controls Design Engineer ll Location: Pleasanton, CA Direct Hire JOB SUMMARY The position requires the individual to apply their technical knowledge and any prior experience to produce controls project design, material selection, and development of sequence of operation for lower to mid-level projects. Responsible for producing closeout documents at the completion of each project. Proficient level of computer skills and understanding of computer-operated systems and engineering des

ASIC Engineer, Design Verification

Meta Platforms, Inc. (f/k/a Facebook, Inc.)

Sunnyvale, California, USA

Full-time

Meta Platforms, Inc. (f/k/a Facebook, Inc.) has the following position in Sunnyvale, CA: ASIC Engineer, Design Verification: Define and implement IP/SoC verification plans, build verification test benches to enable IP/sub-system/SoC level verification. (ref. code REQ-2405-137726: $208,936/year - $234,520/year). Individual pay is determined by skills, qualifications, experience, and location. Compensation details listed in this posting reflect the base salary only, and do not include bonus or eq

Product Design Engineer

Meta Platforms, Inc. (f/k/a Facebook, Inc.)

Sunnyvale, California, USA

Full-time

Meta Platforms, Inc. (f/k/a Facebook, Inc.) has the following position in Sunnyvale, CA: Product Design Engineer: Build tools that help people feel connected, anytime, anywhere. 20% travel required. (ref. code REQ-2405-136889: $171,265/year - $189,200/year). Individual pay is determined by skills, qualifications, experience, and location. Compensation details listed in this posting reflect the base salary only, and do not include bonus or equity or sales incentives, if applicable. In addition t

Principal Design Verification Engineer - IO Subsystem

SambaNova Systems

Palo Alto, California, USA

Full-time

Working at SambaNova This role presents a unique opportunity to shape the future of AI and the value it can unlock across every aspect of an organization s business and operations. We are looking for talented and motivated engineers to help us solve some of the most challenging problems in machine learning, artificial intelligence, and data analytics. As a Principal Design Verification Engineer - IO Subsystem , you'll be responsible for verifying the design, architecture, and micro-architecture

RF/analog/mixed signal IC Design Engineer

Apple, Inc.

Sunnyvale, California, USA

Full-time

Summary We are seeking a highly skilled RF, Analog, and Mixed Signal Engineer to join our engineering team. The ideal candidate will possess strong analytical abilities, a passion for innovation, and extensive experience in designing and implementing RF/mmW and/or analog/mixed-signal circuits. Our team is responsible for all aspects of silicon development for cellular transceivers, with a particular emphasis on highly integrated and efficient designs and technologies that transform the user exp

Need - Power Design Engineer - San Jose, CA - Onsite - C2C - AM

ASCII Group LLC

San Jose, California, USA

Third Party, Contract

Hi, The following requirement is open with our client. Title: Power Design Engineer Location: San Jose, CA Duration:6+ Months Rate:OPEN Visa Status:Any Relevant Experience (in Yrs.): 8+ Detailed Job Description: SEE (minimum) or MSEE or above (preferred)Minimum 15 years of experience as power design engineer. Design experience on the advanced technology is preferred like immersion cooling, GaN high density design etc. It is preferred to have experience of technical lead ever worked/working

Senior Electrical Design Engineer

Jobot

San Jose, California, USA

Full-time

Onsite in Maryland - RELOCATION OFFERED! This Jobot Job is hosted by: David DeCristofaro Are you a fit? Easy Apply now by clicking the "Apply Now" button and sending us your resume. Salary: $130,000 - $180,000 per year A bit about us: We are a leading global manufacturer of tens of thousands of parts and equipment. Our equipment is used in a multitude of sectors including biomedical, manufacturing, space, and others. As an industry leader, we pride ourselves on staying ahead of the curve, and