Microelectronics ASIC Design Engineer Jobs in San Jose, CA

1 - 20 of 2,290 Jobs

Physical Design Engineer with ASIC design Exp.Job Title - Physical Design Engineer with ASIC design Exp.

ApTaskCompany Name - ApTask

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San Jose, California, USA

Full-time

Position: Physical Design Engineer with ASIC design Exp. Location: San Jose, CA (Onsite) Duration: Fulltime Job Description: BS/MS in Electrical Engineering or Computer Science Minimum of hands-on experience in ASIC design and design constraints level synthesis, place and route, timing closure. Standard PnR and signoff tools and their capabilities Understanding of basic power Analysis and power integrity Analysis Excellent English verbal and written communication skills. Self-motivated, abl

RTL ASIC Design EngineerJob Title - RTL ASIC Design Engineer

Innova Solutions, IncCompany Name - Innova Solutions, Inc

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Mountain View, California, USA

Full-time

Innova Solutions is immediately hiring an RTL ASIC Design Engineer Position type: Full Time Duration: Full Time Location: Mountain View, CA (Onsite) As an RTL ASIC Design Engineer, you will: Minimum Qualifications: RTL ASIC Design lead with some storage backgroundExp with Logic design /micro-architecture / RTL coding is a must.Expertise in Verilog & System Verilog is a must.Experience in Synthesis / Understanding of timing concepts for ASIC is required.Experience in design of DDR / USB /SATA/ PC

ASIC Design Engineer Fabric/InterconnectJob Title - ASIC Design Engineer Fabric/Interconnect

Apple, Inc.Company Name - Apple, Inc.

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Santa Clara, California, USA

Full-time

Summary Imagine what you could do here. At Apple, phenomenal ideas have a way of becoming phenomenal products, services, and customer experiences very quickly. Apple is owning the charge in dedication mobile computing with innovative SOC's announced with each of its revolutionary new product offerings. At the core of all Apple mobile SOC's, is an on-chip system interconnect bus that supplies the SOC agents with their requested load and store data from on chip and off chip memories. With every g

ASIC Design Engineer Fabric/InterconnectJob Title - ASIC Design Engineer Fabric/Interconnect

Apple, Inc.Company Name - Apple, Inc.

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Santa Clara, California, USA

Full-time

ASIC Design EngineerJob Title - ASIC Design Engineer

Apple, Inc.Company Name - Apple, Inc.

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Cupertino, California, USA

Full-time

Summary As an ASIC Design Engineer, the individual's primary responsibility will be RTL design. This will include chip architecture definition, block/function definition, specification, design, simulation and unit level verification of digital functions on Mixed Signal ASICs. Key Qualifications Proven track-record in digital design including RTL design experienceStrong understanding of digital design flow including RTL simulation, logic synthesis, timing constraints, timing closure, STA, back

ASIC Design EngineerJob Title - ASIC Design Engineer

BlackFern RecruitmentCompany Name - BlackFern Recruitment

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Milpitas, California, USA

Full-time

Job Description Front-End ASIC Design Engineer - Milpitas, CA Our client develops and delivers ASIC and SoC solutions to customers worldwide in some of the hottest technology areas. The Front-End ASIC Design Engineer will be a key person in this growing design department. Micro-architecture experience is required. Great opportunity to work on current, ongoing and upcoming new projects. Hybrid remote/onsite position. Primary responsibilities include: Support customer s design through all phases o

Camera Imaging ASIC Design EngineerJob Title - Camera Imaging ASIC Design Engineer

Qualcomm TechnologiesCompany Name - Qualcomm Technologies

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Santa Clara, California, USA

Full-time

Company:Qualcomm Technologies, Inc. Job Area:Engineering Group, Engineering Group > Camera Engineering General Summary: The Multimedia Camera HW team is looking for strong ASIC design engineer for an exciting opportunity to be involved in the design of world class image and video processing blocks. As a member of team, the candidate will be responsible for the following: Collaborate with hardware/system architects to micro-architect/design HW specific to Multimedia and Camera ImageSignal Proc

Senior Principal ASIC Design Engineer (Hybrid)Job Title - Senior Principal ASIC Design Engineer (Hybrid)

BAE SystemsCompany Name - BAE Systems

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San Jose, California, USA

Full-time

Job Description You don't see it, but it's there. Our employees work on the world's most advanced electronics - from saving emissions in the City of Lights to powering the Mars Rover to protecting the F-35 fighter jet. At Electronic Systems, you'll be among the brightest minds, working on the aerospace and defense industry's most difficult problems. Drawing strength from our differences, we're innovating for the future. And you can, too. Our flexible work environment provides you a chance to ch

ASIC Engineer, DesignJob Title - ASIC Engineer, Design

Meta Platforms, Inc. (f/k/a Facebook, Inc.)Company Name - Meta Platforms, Inc. (f/k/a Facebook, Inc.)

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Sunnyvale, California, USA

Full-time

Meta Platforms, Inc. (f/k/a Facebook, Inc.) has the following position in Sunnyvale, CA: ASIC Engineer, Design: Work on architecture exploration and micro-architecture development. Perform RTL development using Verilog, System Verilog and HLS. (ref. code REQ-2404-136189: $263,714/year - $287,650/year). Individual pay is determined by skills, qualifications, experience, and location. Compensation details listed in this posting reflect the base salary only, and do not include bonus or equity or s

ASIC/RTL Design Engineer job opportunity at Santa Clara, CA / Longmont, Colorado (Onsite/Hybrid)Job Title - ASIC/RTL Design Engineer job opportunity at Santa Clara, CA / Longmont, Colorado (Onsite/Hybrid)

Infobahn Softworld Inc.Company Name - Infobahn Softworld Inc.

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Santa Clara, California, USA

Contract

Role Title: ASIC/RTL Design Engineer - Senior Location: Santa Clara, CA / Longmont, Colorado (Onsite/Hybrid) Duration: 12+ months contract DESCRIPTION: Responsible for the development of complex multi-mode / multi-corner timing constraints that are compatible for RTL and signoff Drive the effort to maintain RTL quality metrics in complex, hierarchical designs and automating that process for improved efficiency. Drive the pre-route timing checks and QoR clean up to eliminate SDC issues and ens

ASIC Design Verification Engineer (Santa Clara, CA)Job Title - ASIC Design Verification Engineer (Santa Clara, CA)

Qualcomm TechnologiesCompany Name - Qualcomm Technologies

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Santa Clara, California, USA

Full-time

Company:Qualcomm Technologies, Inc. Job Area:Engineering Group, Engineering Group > ASICS Engineering General Summary: Qualcomm is a company of inventors that unlocked 5G ushering in an age of rapid acceleration in connectivity and new possibilities that will transform industries, create jobs, and enrich lives. But this is just the beginning. It takes inventive minds with diverse skills, backgrounds, and cultures to transform 5Gs potential into world-changing technologies and products. This i

Physical Design STA EngineerJob Title - Physical Design STA Engineer

Xoriant CorporationCompany Name - Xoriant Corporation

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San Jose, California, USA

Contract

Hi, This is Himanshu from Xoriant, sharing the below job description for one of our open requirements, please have a look and let me know your valuable feedback along with your updated resume and best time to reach you. Job Position: Physical Design STA Engineer Job Location: San Jose, CA (Hybrid) Job Duration: 6+ Months Contract Job Description: Sr. STA Engineer with15+ years experience for STA position (Physical Design Static Timing Analysis / STA Engineer).Perform static timing analysis (ST

ASIC Verification EngineerJob Title - ASIC Verification Engineer

Nityo Infotech CorporationCompany Name - Nityo Infotech Corporation

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San Jose, California, USA

Full-time

You will be in the Silicon One development organization as an ASIC design verification engineer in San Jose, CA. You collaborate closely with verification engineers, designers, hardware and cross functional teams to verify the ASIC in simulation, in emulation and during ASIC bring up. What You'll Do Maintaining existing DV environments and enhancing themConstruct testbench including scoreboard, agents, sequencers, and monitors for new blocksWrite test plan, develop testcases, debug regression fa

SoC Physical Design Engineer, Electrical AnalysisJob Title - SoC Physical Design Engineer, Electrical Analysis

Apple, Inc.Company Name - Apple, Inc.

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Sunnyvale, California, USA

Full-time

Summary Imagine what you could do here! At Apple, new ideas have a way of becoming extraordinary products, services, and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish. Dynamic, hardworking people and inspiring, innovative technologies are the norm here. The people who work here have reinvented entire industries with all Apple Hardware products. The same passion for innovation that goes into our products also applies

SoC Physical Design Engineer, Electrical AnalysisJob Title - SoC Physical Design Engineer, Electrical Analysis

Apple, Inc.Company Name - Apple, Inc.

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Sunnyvale, California, USA

Full-time

RTL Design Engineer - HybridJob Title - RTL Design Engineer - Hybrid

VIVA USA INCCompany Name - VIVA USA INC

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Santa Clara, California, USA

Contract

Title: RTL Design Engineer - Hybrid Description: Looking for RTL design integration Engineer. JOB DUTIES: Responsible for RTL design using Verilog HDL for implementation and debug. Read and comprehend System on Chip level architectural specification. Write microarchitecture specification for new and modified functions. Responsible for linting and simulation of design. Work with synthesis and backend teams for physical implementation. EDUCATION: Bachelor's or Master's in Computer Engineering KE

Hardware Design Engineer 5Job Title - Hardware Design Engineer 5

Randstad DigitalCompany Name - Randstad Digital

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Mountain View, California, USA

Contract

job summary: Looking for Senior Hardward Design Engineer candidates for an onsite contract in Mountainview, CA. The main function of a hardware engineer is to research, design, develop, test computer or computer-related equipment for commercial, industrial, military, or scientific use. A typical hardware engineer is responsible for the manufacture and installation of computer or computer-related equipment and components. location: Mountain View, California job type: Contract salary: $92.77 -

Hardware Design EngineerJob Title - Hardware Design Engineer

Randstad DigitalCompany Name - Randstad Digital

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Mountain View, California, USA

Contract

job summary: The main function of a hardware engineer is to research, design, develop, test computer or computer-related equipment for commercial, industrial, military, or scientific use. A typical hardware engineer is responsible for the manufacture and installation of computer or computer-related equipment and components. location: Mountain View, California job type: Contract salary: $92.97 - 97.77 per hour work hours: 8am to 5pm education: Bachelors responsibilities: Job Responsibilities

Hardware Design EngineerJob Title - Hardware Design Engineer

Randstad DigitalCompany Name - Randstad Digital

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Mountain View, California, USA

Contract

SoC Physical Design Engineer, Electrical AnalysisJob Title - SoC Physical Design Engineer, Electrical Analysis

Apple, Inc.Company Name - Apple, Inc.

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Sunnyvale, California, USA

Full-time