Onsite Job: FPGA/ASIC Hardware Systems Design Engineer Level 4 Work Location: Hazelwood, MO 63042 Duration: 12+ Months Contract Shift Timings: 8AM to 5PM Is Clearance Required To Start?: No Bachelors Degree and 09+ years of experience Skills Required:Digital Hardware Testing (FPGA/ASIC, Digital CCA, or Digital Unit/LRU)Leading a test engineering teamPrimary Skills:Understanding of industry standard interfaces (e.g., DDR, PCI, I2C, SPI, UART ARINC-429 and Ethernet, etc.,)Familiar with test equip
