Overview
On Site
Full Time
Skills
Mixed-signal integrated circuit
Physical data model
Layout
Schematic
Scratch
Data
Pure Data
Electrical engineering
Collaboration
Integrated circuit
Design
IP
Intellectual property
System on a chip
Debugging
Scripting
Programming languages
Python
Perl
Tcl
Shell
Makefile
C
calibre
LVS
Extraction
Software development
Job Details
Summary
Posted: Oct 3, 2024
Role Number:200571387
Do you love building elegant solutions to highly complex challenges? Do you intrinsically see the importance in every detail? As part of our Silicon Technologies group, you'll help design and manufacture our next-generation, high-performance, power-efficient processor, system-on-chip (SoC). You'll ensure Apple products and services can seamlessly and efficiently handle the tasks that make them beloved by millions! Joining this group means you'll be responsible for crafting and building the technology that fuels Apple's devices. Together, you and your team will enable our customers to do all the things they love with their devices. As a member of our CAD team, you will architect, develop, maintain and improve physical design verification (PDV) flows. The role requires you to work on flow and runset development for various technology nodes and tool sets. Working alongside the CAD team, you will be collaborating with the custom digital/analog/mixed-signal design, physical design (PD) and chip integration teams. With good understanding of design rule checks (DRC) and layout versus schematic (LVS) runsets, you will develop rule decks from scratch and/or modify existing ones.
Description
- Develop, improve and maintain various aspects of physical verification flow and methodology- Coordinate the effort of validating flows, improving for custom checks and data generation- Work with the design and PD teams to facilitate the chip design process- Code custom PDV rule decks such as Electrical rule checks (ERC) and Programmable ERCs- Collaborate with tool vendors and foundries for PDK performance enhancements
Minimum Qualifications
Key Qualifications
Preferred Qualifications
Education & Experience
Additional Requirements
Posted: Oct 3, 2024
Role Number:200571387
Do you love building elegant solutions to highly complex challenges? Do you intrinsically see the importance in every detail? As part of our Silicon Technologies group, you'll help design and manufacture our next-generation, high-performance, power-efficient processor, system-on-chip (SoC). You'll ensure Apple products and services can seamlessly and efficiently handle the tasks that make them beloved by millions! Joining this group means you'll be responsible for crafting and building the technology that fuels Apple's devices. Together, you and your team will enable our customers to do all the things they love with their devices. As a member of our CAD team, you will architect, develop, maintain and improve physical design verification (PDV) flows. The role requires you to work on flow and runset development for various technology nodes and tool sets. Working alongside the CAD team, you will be collaborating with the custom digital/analog/mixed-signal design, physical design (PD) and chip integration teams. With good understanding of design rule checks (DRC) and layout versus schematic (LVS) runsets, you will develop rule decks from scratch and/or modify existing ones.
Description
- Develop, improve and maintain various aspects of physical verification flow and methodology- Coordinate the effort of validating flows, improving for custom checks and data generation- Work with the design and PD teams to facilitate the chip design process- Code custom PDV rule decks such as Electrical rule checks (ERC) and Programmable ERCs- Collaborate with tool vendors and foundries for PDK performance enhancements
Minimum Qualifications
- Previous industry experience in Silicon chip design flows
- IP/SOC level PDV debug experience in various technology nodes
- Scripting skills in programming languages such as Python, Perl, Tcl, Shell, Makefile or C
- Experience with flow automation and development
- Minimum requirement of BS and 3+ years of relevant industry experience
Key Qualifications
Preferred Qualifications
- Knowledge in Calibre/ICV/Pegasus runset coding for DRC/LVS
- Rule coding in PERC is a plus
- Knowledge of parasitic extraction, SKILL coding, and PnR tools is a plus
Education & Experience
Additional Requirements
- Apple is an equal opportunity employer that is committed to inclusion and diversity. We take affirmative action to ensure equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics. Learn more about your EEO rights as an applicant.
Employers have access to artificial intelligence language tools (“AI”) that help generate and enhance job descriptions and AI may have been used to create this description. The position description has been reviewed for accuracy and Dice believes it to correctly reflect the job opportunity.