C++ / FPGA Developer

Overview

On Site
Compensation information provided in the description
Full Time

Skills

C++
Firmware
Computer Networking
RF
Distribution
Signal Integrity
Timing Closure
SystemVerilog
Python
HLS
C
Embedded C
VHDL
Verilog
SDK
FPGA
Modelsim
Embedded Systems
Real-time
Operating Systems
RTOS
Debugging
Conflict Resolution
Problem Solving
Digital Signal Processing
Computer Hardware
Linux
Shell Scripting
Radio
Xilinx
Management
Managed Services
Collaboration
Partnership
Value Engineering
Effective Communication
Law

Job Details

C++ / FPGA Developer
El Segundo area, CA
6+ month contract
$70-$80 an hour

Immediate hire for Senior FPGA Firmware Engineer with expertise in digital signal processing, coherent combining of digital signals, high-bandwidth networking, and VITA 49. In this role, you will design, develop, and optimize FPGA-based solutions using Xilinx High-Level Synthesis (HLS) using C++. Develop coherent combining and beamforming modules using C++ and Xilinx HLS, ensuring precise phase alignment across multiple channels. Requirements capturing, design definition & implementation of VHDL detailed designs. Implement VITA 49-compliant data packetization for high-speed IF or RF data distribution. Design and fine-tune DSP blocks (e.g., FFT, filtering, NCO, cross-correlation) to meet stringent real-time and resource utilization requirements. Work closely with cross-functional teams to ensure signal integrity and minimize latency in large-scale, multi-channel systems. Use Vivado (or Vitis) for synthesis, simulation, timing closure, and debug. Create testbenches in C++/System Verilog/Python to validate functional correctness and phase coherence across all channels.

Requirements:
  • 5+ years of relevant experience in FPGA design and development
  • Experience with Xilinx UltraScale+ MPSoC
  • Knowledge of High-Level Synthesis (HLS)
  • Solid understanding of C/embedded C++ programming
  • Proficiency in VHDL/Verilog and FPGA design methodologies
  • Experience with Vivado Design Suite and Xilinx SDK
  • Proficiency in FPGA development flows (Vivado, ModelSim, or similar) and lab debugging (ILAs, scopes).
  • Familiarity with embedded systems and real-time operating systems (RTOS)
  • Strong debugging and problem-solving skills
  • Experience with digital signal processing (DSP)
  • Knowledge of hardware-software co-design
  • Strong knowledge of Linux commands and shell scripting
  • Ability to work in a team environment and collaborate with cross-functional teams
  • PHD strongly preferred or Masters degree in related discipline
Bonus Skills:
  • Knowledge of Software-Defined Radio (SDR) is a plus
  • Experience with Xilinx RFSoC is a plus

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