Sr Staff R&D Engineer

Responsibilities:

• Architect, Implement and integrate high speed interface IP with required interface PHY device on circuit board to Synopsys FPGA based prototyping hardware platform.
• Define methodology, bring up, debug, and validate interface IP FPGA prototyping implementation and application using simulation and hardware test.
• Document design specification and application note along with example designs.
• Work with product engineers and field application engineers to guide customer implementation and help resolving customer issues.
• Collaborate with other teams including cross BU.

Requirements:

• Extensive hands-on experience in design and validation of FPGA IP and hardware for FPGA prototyping. Experience with applications related to the following and other interface technologies is a plus.
  • video interface technologies such as MIPI, DisplayPort, and HDMI
  • transceiver based technologies such as PCIe, USB, and Ethernet
• Experience in translating high level application requirements to solution architecture definition, implementation requirements, and validation plan including required FPGA IP, hardware board, and software/firmware.
• Extensive experience in validating implementation against design requirements for both functionality and performance. Debug skill and experience in defining design validation methodology and troubleshooting bring-up and customer usage issues.
• Proficiency in FPGA IP development including RTL coding, design debug, functionality validation from simulation to hardware bring-up.
• Good understanding of board design challenges and able to work with board design engineers through entire implementation process until demonstrating a functional design on hardware. Hands-on experience in hardware board design is a plus.
• Good communication skill and team collaboration with both Synopsys internal and external teams. Experience and willingness to mentor Junior engineers
• Experienced user of FPGA development tools including Synopsys Synplify and ProtoCompiler, Xilinx Vivado and/or Intel/Altera FPGA tools
• Proficiency in software tools such as script languages and C programming
• 10+ year working experience in FPGA prototyping and high-speed interface required.
• MS or PhD preferred.

The base salary range across the U.S. for this role is between $155,000 - $233,000. In addition, this role may be eligible for an annual bonus, equity, and other discretionary bonuses. Synopsys offers comprehensive health, wellness, and financial benefits as part of a of a competitive total rewards package. The actual compensation offered will be based on a number of job-related factors, including location, skills, experience, and education. Your recruiter can share more specific details on the total rewards package upon request.

We Are:
At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.

Rewards and Benefits:
We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.

Inclusion and Diversity:
Inclusion and Diversity are important to us. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, gender identity, age, military veteran status, or disability.

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