Package Design Engineer

Overview

On Site
USD 107,000.00 - 190,000.00 per year
Full Time

Skills

Leadership
Research and Development
Artificial intelligence
Computer networking
High performance computing
HPC
RF
Microwave
ASIC
Partnership
Packaging engineering
Design automation
Software development
DDR SDRAM
Project management
UI
Integrated circuit
Packaging design
SERDES
Signal integrity
Cadence
Allegro
Collaboration
Design
Management
Documentation
Law

Job Details

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Job Description:

Broadcom is seeking an experienced package design engineer for complex flip-chip-BGA packages for industry-leading ASICs with high-speed SerDes and very-high-power delivery needs. You will be part of a worldwide R&D team developing high-performance package designs for ASICs for artificial intelligence (AI), networking, high-performance computing (HPC), and 5G base stations. These designs include SerDes at 224G and higher, 5G RF/Microwave ADC/DAC, HBM, DDR5 and more. You'll have the opportunity to collaborate with the team to create the package structures needed to enable new design, and contribute to efficiency improvements for our design team.

RESPONSIBILITIES:

Overall design responsibility for ASIC package designs, including aspects of signal integrity, power integrity, manufacturability, reliability, and thermal, in partnership with our experienced team of package engineering experts.

1 or more years experience with Cadence SKILL for Allegro, or similar design-automation coding experience and interest (3 or more years is preferred)

Package Design of critical structures for SerDes, ADC/DAC, DDR, etc.

Schedule, prioritize, & track your work across 2+ projects simultaneously

General flip-chip BGA package design & engineering

Project management and customer interface for your design projects

Contribute to efficiency improvements for the design g

EDUCATION/EXPERIENCE & REQUIREMENTS:

BSEE or similar field and 8+ years experience in flip-chip-BGA package design, including high-speed SerDes or MSEE or similar field and 6+ years experience in flip-chip-BGA package design, including high-speed SerDes

Knowledge of package-level signal integrity and power integrity, to apply to package designs

Cadence APD (allegro package designer) experience is preferred. Equivalent tool is OK.

Cooperate with our world-wide team (multiple time zones), including co-design with internal team members and external (Vendor) designers

Self-management and organization skills

Additional Job Description:

Compensation and Benefits

The annual base salary range for this position is $107,000 - $190,000.

This position is also eligible for a discretionary annual bonus in accordance with relevant plan documents, and equity in accordance with equity plan documents and equity award agreements.

Broadcom offers a competitive and comprehensive benefits package: Medical, dental and vision plans, 401(K) participation including company matching, Employee Stock Purchase Program (ESPP), Employee Assistance Program (EAP), company paid holidays, paid sick leave and vacation time. The company follows all applicable laws for Paid Family Leave and other leaves of absence.

Broadcom is proud to be an equal opportunity employer. We will consider qualified applicants without regard to race, color, creed, religion, sex, sexual orientation, gender identity, national origin, citizenship, disability status, medical condition, pregnancy, protected veteran status or any other characteristic protected by federal, state, or local law. We will also consider qualified applicants with arrest and conviction records consistent with local law.

If you are located outside USA, please be sure to fill out a home address as this will be used for future correspondence.
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