Defect Engineer

Overview

On Site
USD 107,000.00 - 171,000.00 per year
Full Time

Skills

Wireless communication
Semiconductors
Word-sense disambiguation
Product development
Assembly
Visual control
Inspection
Metrology
Data Analysis
Corrective and preventive action
PDCA
Continuous improvement
Operations
Data collection
Semiconductor fabrication
Analytical skill
Problem solving
Defect analysis
Statistical process control
JMP
Manufacturing
Leadership
Attention to detail
FOCUS
Multitasking
Communication
Writing
Management
Materials science
Physics
Chemistry
Process engineering
ROOT
SEM
Scanning electron microscope
Tivoli Endpoint Manager
TEM
FIB
Data
Programming languages
Python
SQL
Database
Reporting
Trend analysis
Legal
Authorization
Documentation
Law

Job Details

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Job Description:

Job Overview:

As a defect engineer with the Wireless Semiconductor Division (WSD) of Broadcom Inc., you will identify, analyze, and minimize defects in the FBAR filter fabrication process. Utilizing visual inspection and physical analysis data you will separate killer and cosmetic defects, Pareto defect sources, and provide actionable data to the cross-functional fab team thus minimizing yield loss and reliability failures observed by downstream wafer sort, assembly, and test, and the end customer. You will work with product development and backend assembly in characterizing defects. You define line partitioning and sampling, and own the FBAR visual control plan.

Key Responsibilities:
  • Works closely with management to define defect objectives. Defines fab inspection and data automation needs.
  • Using metrology tools, data analysis (SEM, TEM, AFM, FIB), and physical analysis, defines technology baseline defectivity and Pareto. Identify offending tools, processes, or infrastructure. Where appropriate, puts tools down and/or initiates corrective action PDCA (Plan-Do-Check-Act) or 8D and assigns to the appropriate owner.
  • For new technologies, establish process baseline and appropriate controls. Separate nuisance vs. killer defects. Drive continuous process improvement.
  • Defines line partitioning, sampling, and utilizes Klarity and SPC to maintain fab defect control.
  • Dispositions out-of-control (OOC) material beyond the scope of engineering technicians. Mentors engineering technicians in defect identification, characterization, and disposition.
  • Leads cross-functional teams investigating the source of out-of-control (OOC) material and trend shifts in defectivity. Categorizes, catalogs, and documents defects, writes out-of-control-action-plans (OCAPs), trains engineering techs and operations staff to the disposition of material.
  • Develops and tests hypotheses including designing experiments and implementing solutions to highly complex technical problems.
  • Separates real and nuisance defects driving required data collection. Submit jobs to the physical analysis lab (PAL) and bench test to characterize defects.
  • Supports the containment and disposition of non-conforming material.
  • Drives quality before speed and cost mindset in the organization; drives low defect culture across the fab.


Required Skills & Qualifications:
  • Educational Background: BS EE, Material Science, Physics, Chemistry, or related field.
  • Experience: 8+ years of experience in high volume wafer fabrication process engineering, defect engineering, or yield enhancement.
  • Technical Expertise: Working knowledge of multiple semiconductor fabrication process modules (e.g. photo, etch, dep, CMP, test, etc.). Strong analytical and problem solving skills. Expertise in Klarity defect analysis software. Practical experience with statistical process control (SPC) and an advanced user of JMP.
  • Leadership: Ability to work independently and facilitate/lead teams in the resolution of highly complex manufacturing problems. A track record of leading cross-functional teams to identify the source and solve problems.
  • Attention to Detail: Detail oriented - able to focus on detail while multitasking. Self-awareness - knows when and who to ask for help.
  • Communication: Demonstrated ability to communicate clearly and concisely both verbally and in writing to a wide variety of audiences including operators, engineering, and fab management.


Preferred Skills & Qualifications:
  • Educational Background: MS, or PhD in EE, Material Science, Physics, Chemistry, or related field.
  • Experience: 12+ years of experience in high volume wafer fabrication process engineering, defect engineering, or yield enhancement.
  • Technical Expertise: Experience and track record of identifying the root cause of defects using physical analysis lab (PAL) using standard tools (e.g. SEM, TEM, AFM, FIB). Experience with defect data automation, automatic defect detection, and classification.
  • Advanced user of programming languages like python or SQL to be able to query large defect databases in support of automating reporting and trend analysis.


Other Requirements:
  • Familiarity with cleanroom protocols and safety standards
  • Legal authorization to work in the U.S. is required


Additional Job Description:

Compensation and Benefits

The annual base salary range for this position is $107,000 - $171,000.

This position is also eligible for a discretionary annual bonus in accordance with relevant plan documents, and equity in accordance with equity plan documents and equity award agreements.

Broadcom offers a competitive and comprehensive benefits package: Medical, dental and vision plans, 401(K) participation including company matching, Employee Stock Purchase Program (ESPP), Employee Assistance Program (EAP), company paid holidays, paid sick leave and vacation time. The company follows all applicable laws for Paid Family Leave and other leaves of absence.

Broadcom is proud to be an equal opportunity employer. We will consider qualified applicants without regard to race, color, creed, religion, sex, sexual orientation, gender identity, national origin, citizenship, disability status, medical condition, pregnancy, protected veteran status or any other characteristic protected by federal, state, or local law. We will also consider qualified applicants with arrest and conviction records consistent with local law.

If you are located outside USA, please be sure to fill out a home address as this will be used for future correspondence.
Employers have access to artificial intelligence language tools (“AI”) that help generate and enhance job descriptions and AI may have been used to create this description. The position description has been reviewed for accuracy and Dice believes it to correctly reflect the job opportunity.